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authorTom Rini2023-02-12 15:25:09 -0500
committerTom Rini2023-02-12 15:25:09 -0500
commit386e77cda8b690dbf5b2b7c828b3313205e5078c (patch)
tree50308d557caee50e8decc77f4be5ddfdeabcc9cb /arch/powerpc/dts
parent0d91c88230fe8bd9f8d39ca2ab69cd6282e9f949 (diff)
parent6a8c36b936ab69a7521ec1ecfd20f7b85f7f59c5 (diff)
Merge branch 'for-2023.04' of https://source.denx.de/u-boot/custodians/u-boot-mpc8xx
- A fix for a long standing bug that has been exposed by commit 50128aeb0f8 ("cyclic: get rid of cyclic_init()") preventing 8xx boards from booting since u-boot 2023.01 - A GPIO driver for powerpc 8xx chip - Fixup for powerpc 8xx SPI driver - A new powerpc 8xx board - The two devices having that board.
Diffstat (limited to 'arch/powerpc/dts')
-rw-r--r--arch/powerpc/dts/Makefile1
-rw-r--r--arch/powerpc/dts/cmpc885.dts94
2 files changed, 95 insertions, 0 deletions
diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile
index a4b0d7ddc4f..26b592b85db 100644
--- a/arch/powerpc/dts/Makefile
+++ b/arch/powerpc/dts/Makefile
@@ -29,6 +29,7 @@ dtb-$(CONFIG_TARGET_TUGE1) += kmtuge1.dtb
dtb-$(CONFIG_TARGET_TUXX1) += kmtuxa1.dtb
dtb-$(CONFIG_TARGET_MCR3000) += mcr3000.dtb
dtb-$(CONFIG_TARGET_GAZERBEAM) += gazerbeam.dtb
+dtb-$(CONFIG_TARGET_CMPC885) += cmpc885.dtb
include $(srctree)/scripts/Makefile.dts
diff --git a/arch/powerpc/dts/cmpc885.dts b/arch/powerpc/dts/cmpc885.dts
new file mode 100644
index 00000000000..adda0f3e9dd
--- /dev/null
+++ b/arch/powerpc/dts/cmpc885.dts
@@ -0,0 +1,94 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * CMPC885 Device Tree Source
+ *
+ * Copyright 2020 CS Group
+ *
+ */
+
+/dts-v1/;
+
+/ {
+ model = "CMPC885";
+ compatible = "fsl, cmpc885", "fsl,mod885";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ chosen {
+ stdout-path = &SERIAL;
+ };
+
+ WDT: watchdog@0 {
+ device_type = "watchdog";
+ compatible = "fsl,pq1-wdt";
+ };
+
+ SERIAL: serial {
+ compatible = "fsl,pq1-smc";
+ };
+
+ FEC1: fec@0 {
+ compatible = "fsl,pq1-fec1";
+ };
+
+ FEC2: fec@1 {
+ compatible = "fsl,pq1-fec2";
+ };
+
+ soc: immr@ff000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device-type = "soc";
+ compatible = "simple-bus";
+ ranges = <0 0xff000000 0x4000>;
+ reg = <0xff000000 0x00000200>;
+
+ CPM1_PIO_B: gpio-controller@ab8 {
+ #gpio-cells = <2>;
+ compatible = "fsl,cpm1-pario-bank-b";
+ reg = <0xab8 0x10>;
+ gpio-controller;
+ };
+
+ CPM1_PIO_D: gpio-controller@970 {
+ #gpio-cells = <2>;
+ compatible = "fsl,cpm1-pario-bank-d";
+ reg = <0x970 0x10>;
+ gpio-controller;
+ };
+
+ CPM1_PIO_A: gpio-controller@950 {
+ #gpio-cells = <2>;
+ compatible = "fsl,cpm1-pario-bank-a";
+ reg = <0x950 0x10>;
+ gpio-controller;
+ };
+
+ CPM1_PIO_C: gpio-controller@960 {
+ #gpio-cells = <2>;
+ compatible = "fsl,cpm1-pario-bank-c";
+ reg = <0x960 0x10>;
+ gpio-controller;
+ };
+
+ CPM1_PIO_E: gpio-controller@ac8 {
+ #gpio-cells = <2>;
+ compatible = "fsl,cpm1-pario-bank-e";
+ reg = <0xac8 0x18>;
+ gpio-controller;
+ };
+
+ spi: spi@aa0 {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ cell-index = <0>;
+ compatible = "fsl,mpc8xx-spi";
+ gpios = <&CPM1_PIO_B 21 1>; /* /EEPROM_CS ACTIVE_LOW */
+
+ eeprom@0 {
+ cell-index = <1>;
+ };
+ };
+ };
+};