diff options
| author | Anatolij Gustschin | 2013-02-08 00:03:49 +0000 |
|---|---|---|
| committer | Wolfgang Denk | 2013-03-09 08:23:02 +0100 |
| commit | a615dfda8c2041dd98ecd238d45f3bc35e495b44 (patch) | |
| tree | b177e8e05649ba7da7f8f7dcfe309fb29b7aef68 /arch/powerpc/include | |
| parent | fcc7fe425183f9ec95fba33d041eb359d0a3a598 (diff) | |
mpc512x: Adjust the DRAM init sequence to the datasheet spec
Do maintain a 200 usecs period of stable power and clock before
asserting the CKE signal and sending commands, have at least 200
DRAM clock cycles pass after initialization before data access.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Diffstat (limited to 'arch/powerpc/include')
| -rw-r--r-- | arch/powerpc/include/asm/immap_512x.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/immap_512x.h b/arch/powerpc/include/asm/immap_512x.h index a330ad6df84..d96e53646ad 100644 --- a/arch/powerpc/include/asm/immap_512x.h +++ b/arch/powerpc/include/asm/immap_512x.h @@ -351,6 +351,7 @@ typedef struct ddr512x { /* MDDRC SYS CFG and Timing CFG0 Registers */ #define MDDRC_SYS_CFG_EN 0xF0000000 +#define MDDRC_SYS_CFG_CKE_MASK 0x40000000 #define MDDRC_SYS_CFG_CMD_MASK 0x10000000 #define MDDRC_REFRESH_ZERO_MASK 0x0000FFFF |