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authorChristophe Leroy2023-03-02 10:48:58 +0100
committerChristophe Leroy2023-04-06 14:50:03 +0200
commit6792e85ee643e412d7c61fe3699326498260ece7 (patch)
treeee8262dc5248a92c1b4263a9e1a72c961d2ae887 /arch/powerpc
parent0fd79138dc2394ea7820f583f8abfa06be0155f9 (diff)
powerpc: mpc832x: Fix reset word
According to the reference manual, the Reset Configuration Word Low Register bits 2-3 must be set to 0b10. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/cpu/mpc83xx/hrcw/Kconfig3
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/powerpc/cpu/mpc83xx/hrcw/Kconfig b/arch/powerpc/cpu/mpc83xx/hrcw/Kconfig
index b67ccd661d3..44f66cd5287 100644
--- a/arch/powerpc/cpu/mpc83xx/hrcw/Kconfig
+++ b/arch/powerpc/cpu/mpc83xx/hrcw/Kconfig
@@ -539,8 +539,7 @@ config DDR_MC_CLOCK_MODE
config SYSTEM_PLL_VCO_DIV
int
- default 0 if ARCH_MPC832X
- default 2 if ARCH_MPC8313
+ default 2 if ARCH_MPC8313 || ARCH_MPC832X
default 0 if SYSTEM_PLL_VCO_DIV_2 && !ARCH_MPC8360 && !ARCH_MPC837X
default 1 if SYSTEM_PLL_VCO_DIV_4 && !ARCH_MPC8360 && !ARCH_MPC837X
default 2 if SYSTEM_PLL_VCO_DIV_8 && !ARCH_MPC8360 && !ARCH_MPC837X