diff options
| author | Bin Meng | 2018-10-08 06:55:56 -0700 |
|---|---|---|
| committer | York Sun | 2018-10-29 13:13:33 -0700 |
| commit | c00d0012f5d6aa3987f5465caf8b6ead5ac919ff (patch) | |
| tree | b6adcba67c2bf5b7173d63025a6a9ee504fa2b91 /arch/powerpc | |
| parent | 4eaf7f525a0874a1eff0f5666004896cc5c89fa3 (diff) | |
powerpc: t1040: Correct RCW MAC2_GMII_SEL value
Per T1040RM (Rev. 1, 08/2015), the value of
FSL_CORENET_RCWSR13_MAC2_GMII_SEL_ENET_PORT is wrong
and should be 0x00000080 (bit 440 in the RCW).
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Poonam Aggrwal <poonam.aggrwal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/powerpc')
| -rw-r--r-- | arch/powerpc/include/asm/immap_85xx.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index 79950936210..8ec2a38aad4 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -1789,7 +1789,7 @@ typedef struct ccsr_gur { #define FSL_CORENET_RCWSR13_EC2_FM1_DTSEC5_MII 0x20000000 #define FSL_CORENET_RCWSR13_MAC2_GMII_SEL 0x00000080 #define FSL_CORENET_RCWSR13_MAC2_GMII_SEL_L2_SWITCH 0x00000000 -#define FSL_CORENET_RCWSR13_MAC2_GMII_SEL_ENET_PORT 0x80000000 +#define FSL_CORENET_RCWSR13_MAC2_GMII_SEL_ENET_PORT 0x00000080 #define CONFIG_SYS_FSL_SCFG_PIXCLKCR_OFFSET 0x28 #define PXCKEN_MASK 0x80000000 #define PXCK_MASK 0x00FF0000 |