diff options
| author | Tom Rini | 2023-12-09 14:35:44 -0500 |
|---|---|---|
| committer | Tom Rini | 2023-12-09 14:35:44 -0500 |
| commit | 873791433602281ed230486606e326983c97a285 (patch) | |
| tree | 913578d78305a56be87a59088484c6c8f77bf369 /arch/riscv/dts/jh7110.dtsi | |
| parent | dd29208815bae293df1ac1bfb8f298a541f5bd4d (diff) | |
| parent | 94533cd9c15a60b74420e53a725fab54d38dd555 (diff) | |
Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
- StarFive: Add StarFive watchdog driver
- VisionFive2: Support device tree overlay for VisionFive2 board
- Andes: Fix PLIC-SW setting
- RISC-V: Fix NVMe support by implying NVME_PCI for QEMU
- RISC-V: Fix binman for 64 bit format load address
Diffstat (limited to 'arch/riscv/dts/jh7110.dtsi')
| -rw-r--r-- | arch/riscv/dts/jh7110.dtsi | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/riscv/dts/jh7110.dtsi b/arch/riscv/dts/jh7110.dtsi index 13c47f7caa3..6d2675d6cea 100644 --- a/arch/riscv/dts/jh7110.dtsi +++ b/arch/riscv/dts/jh7110.dtsi @@ -533,6 +533,16 @@ #gpio-cells = <2>; }; + watchdog@13070000 { + compatible = "starfive,jh7110-wdt"; + reg = <0x0 0x13070000 0x0 0x10000>; + clocks = <&syscrg JH7110_SYSCLK_WDT_APB>, + <&syscrg JH7110_SYSCLK_WDT_CORE>; + clock-names = "apb", "core"; + resets = <&syscrg JH7110_SYSRST_WDT_APB>, + <&syscrg JH7110_SYSRST_WDT_CORE>; + }; + mmc0: mmc@16010000 { compatible = "starfive,jh7110-mmc"; reg = <0x0 0x16010000 0x0 0x10000>; |