diff options
| author | Atish Patra | 2020-04-21 14:51:57 -0700 |
|---|---|---|
| committer | Andes | 2020-05-26 15:50:08 +0800 |
| commit | 7e249bc13aaf204a08e70044ebba04f404f6cf85 (patch) | |
| tree | e4adc0b5ff49db7064a82713bd9048378e8ce9dc /arch/riscv/lib | |
| parent | 8c48bb21bd6a1778d1f299de30ff62c07929702b (diff) | |
riscv: Move all SMP related SBI calls to SBI_v01
SMP support for S-mode U-Boot is enabled only if SBI_V01 is enabled.
There is no point in supporting SMP related (IPI and fences) SBI calls
when SBI_V02 is enabled.
Modify all the SMP related SBI calls to be defined only for SBI_V01.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/riscv/lib')
| -rw-r--r-- | arch/riscv/lib/sbi.c | 37 |
1 files changed, 18 insertions, 19 deletions
diff --git a/arch/riscv/lib/sbi.c b/arch/riscv/lib/sbi.c index 7bdf071dbbe..993597e33db 100644 --- a/arch/riscv/lib/sbi.c +++ b/arch/riscv/lib/sbi.c @@ -39,6 +39,23 @@ struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0, return ret; } +/** + * sbi_set_timer() - Program the timer for next timer event. + * @stime_value: The value after which next timer event should fire. + * + * Return: None + */ +void sbi_set_timer(uint64_t stime_value) +{ +#if __riscv_xlen == 32 + sbi_ecall(SBI_EXT_SET_TIMER, SBI_FID_SET_TIMER, stime_value, + stime_value >> 32, 0, 0, 0, 0); +#else + sbi_ecall(SBI_EXT_SET_TIMER, SBI_FID_SET_TIMER, stime_value, + 0, 0, 0, 0, 0); +#endif +} + #ifdef CONFIG_SBI_V01 /** @@ -86,25 +103,6 @@ void sbi_shutdown(void) sbi_ecall(SBI_EXT_0_1_SHUTDOWN, 0, 0, 0, 0, 0, 0, 0); } -#endif /* CONFIG_SBI_V01 */ - -/** - * sbi_set_timer() - Program the timer for next timer event. - * @stime_value: The value after which next timer event should fire. - * - * Return: None - */ -void sbi_set_timer(uint64_t stime_value) -{ -#if __riscv_xlen == 32 - sbi_ecall(SBI_EXT_SET_TIMER, SBI_FID_SET_TIMER, stime_value, - stime_value >> 32, 0, 0, 0, 0); -#else - sbi_ecall(SBI_EXT_SET_TIMER, SBI_FID_SET_TIMER, stime_value, - 0, 0, 0, 0, 0); -#endif -} - /** * sbi_send_ipi() - Send an IPI to any hart. * @hart_mask: A cpu mask containing all the target harts. @@ -185,3 +183,4 @@ int sbi_probe_extension(int extid) return -ENOTSUPP; } +#endif /* CONFIG_SBI_V01 */ |