diff options
| author | Michal Simek | 2023-12-20 15:53:28 +0100 |
|---|---|---|
| committer | Leo Yu-Chi Liang | 2023-12-27 17:29:02 +0800 |
| commit | 670db88c79ce88ff6c053f6507404bd6752b664f (patch) | |
| tree | 91766cfaacf02ccbfd19568d79a3c5e4448d0c6f /arch/riscv | |
| parent | 40c76dfed29ac2173bd32d730979ef2531029048 (diff) | |
riscv: Extend board compatible string with "qemu,mbv"
Extend compatible string to match the latest change in dt binding.
Fixes: 7576ab2facae ("riscv: Add support for AMD/Xilinx MicroBlaze V")
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Diffstat (limited to 'arch/riscv')
| -rw-r--r-- | arch/riscv/dts/xilinx-mbv32.dts | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/riscv/dts/xilinx-mbv32.dts b/arch/riscv/dts/xilinx-mbv32.dts index 6a6b8b694bd..94e42c26811 100644 --- a/arch/riscv/dts/xilinx-mbv32.dts +++ b/arch/riscv/dts/xilinx-mbv32.dts @@ -12,7 +12,7 @@ #address-cells = <1>; #size-cells = <1>; model = "AMD MicroBlaze V 32bit"; - compatible = "amd,mbv"; + compatible = "qemu,mbv", "amd,mbv"; cpus: cpus { #address-cells = <1>; |