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authorTom Rini2021-08-26 11:47:59 -0400
committerTom Rini2021-08-31 17:47:49 -0400
commitab92b38a0161f0d8efa1c2112d944ef8f755dfbe (patch)
treef4413fb22813b940ce12ca5079c67c7149ade8e3 /arch/riscv
parente4ddf14305b28e788e09a9b1b5b2b2474234eb91 (diff)
Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig
We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16. Introduce select statements for other architectures based on current usage. For MIPS, we take the existing arch-specific symbol and migrate to the generic symbol. This lets us remove a little bit of otherwise unused code. Cc: Alexey Brodkin <alexey.brodkin@synopsys.com> Cc: Anup Patel <anup.patel@wdc.com> Cc: Atish Patra <atish.patra@wdc.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Leo <ycliang@andestech.com> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Sean Anderson <seanga2@gmail.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
Diffstat (limited to 'arch/riscv')
-rw-r--r--arch/riscv/Kconfig2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 4b0c3dffa6b..691ed113824 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -22,9 +22,11 @@ config TARGET_SIFIVE_UNLEASHED
config TARGET_SIFIVE_UNMATCHED
bool "Support SiFive Unmatched Board"
+ select SYS_CACHE_SHIFT_6
config TARGET_SIPEED_MAIX
bool "Support Sipeed Maix Board"
+ select SYS_CACHE_SHIFT_6
config TARGET_OPENPITON_RISCV64
bool "Support RISC-V cores on OpenPiton SoC"