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authorBin Meng2015-06-23 12:18:49 +0800
committerSimon Glass2015-07-14 18:03:17 -0600
commit3d232878289bf59e83c6b152407a01f6e0fb790b (patch)
tree55413b7266202a293c1df5d571e22700b2370485 /arch/x86/cpu/ioapic.c
parentba9091f55d68fc3d7b65a710f9d47c0be15e816d (diff)
x86: Add I/O APIC register access routines
I/O APIC registers are addressed indirectly. Add io_apic_read() and io_apic_write() routines to help register access. Two macros for I/O APIC ID and version register offset are also added. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/cpu/ioapic.c')
-rw-r--r--arch/x86/cpu/ioapic.c21
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/x86/cpu/ioapic.c b/arch/x86/cpu/ioapic.c
new file mode 100644
index 00000000000..112a9c63b44
--- /dev/null
+++ b/arch/x86/cpu/ioapic.c
@@ -0,0 +1,21 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/ioapic.h>
+
+u32 io_apic_read(u32 reg)
+{
+ writel(reg, IO_APIC_INDEX);
+ return readl(IO_APIC_DATA);
+}
+
+void io_apic_write(u32 reg, u32 val)
+{
+ writel(reg, IO_APIC_INDEX);
+ writel(val, IO_APIC_DATA);
+}