diff options
| author | Stefan Roese | 2019-08-16 14:45:28 +0200 |
|---|---|---|
| committer | Bin Meng | 2019-08-18 21:54:10 +0800 |
| commit | 8ad01ce36f71113d9b4c58fb71422d47e86df176 (patch) | |
| tree | d49fbcdf8373291655aea1e3014852390a4ebae3 /arch/x86/cpu | |
| parent | ad79d603aa68a7a523005ce694ee4b43efdf7382 (diff) | |
x86: Remove x86 specific GD flags as they are not referenced at all
This patch removes the x86 architecture specific GD flags
(GD_FLG_COLD_BOOT & GD_FLG_WARM_BOOT), as they are not used. Only
GD_FLG_COLD_BOOT is referenced in coreboot.c but assigned in start16.S.
But the coreboot target does not use start16.S at all and boots directly
from the 32-bit start code.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Diffstat (limited to 'arch/x86/cpu')
| -rw-r--r-- | arch/x86/cpu/coreboot/coreboot.c | 3 | ||||
| -rw-r--r-- | arch/x86/cpu/start.S | 9 | ||||
| -rw-r--r-- | arch/x86/cpu/start16.S | 3 |
3 files changed, 1 insertions, 14 deletions
diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c index 4c6ed0bfb28..9686f8ed5b4 100644 --- a/arch/x86/cpu/coreboot/coreboot.c +++ b/arch/x86/cpu/coreboot/coreboot.c @@ -73,9 +73,6 @@ static void board_final_cleanup(void) int last_stage_init(void) { - if (gd->flags & GD_FLG_COLD_BOOT) - timestamp_add_to_bootstage(); - /* start usb so that usb keyboard can be used as input device */ if (CONFIG_IS_ENABLED(USB_KEYBOARD)) usb_init(); diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S index 71cd70f9cde..3c9bdf2a9d6 100644 --- a/arch/x86/cpu/start.S +++ b/arch/x86/cpu/start.S @@ -40,9 +40,6 @@ _x86boot_start: movl %eax, %cr0 wbinvd - /* Tell 32-bit code it is being entered from an in-RAM copy */ - movl $GD_FLG_WARM_BOOT, %ebx - /* * Zero the BIST (Built-In Self Test) value since we don't have it. * It must be 0 or the previous loader would have reported an error. @@ -55,11 +52,7 @@ _x86boot_start: .align 4 .long 0x12345678 _start: - /* - * This is the 32-bit cold-reset entry point, coming from start16. - * Set %ebx to GD_FLG_COLD_BOOT to indicate this. - */ - movl $GD_FLG_COLD_BOOT, %ebx + /* This is the 32-bit cold-reset entry point, coming from start16 */ /* Save BIST */ movl %eax, %ebp diff --git a/arch/x86/cpu/start16.S b/arch/x86/cpu/start16.S index dd659278ffe..474efe4df5f 100644 --- a/arch/x86/cpu/start16.S +++ b/arch/x86/cpu/start16.S @@ -23,9 +23,6 @@ start16: /* Save BIST */ movl %eax, %ecx - /* Set the Cold Boot / Hard Reset flag */ - movl $GD_FLG_COLD_BOOT, %ebx - xorl %eax, %eax movl %eax, %cr3 /* Invalidate TLB */ |