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authorBin Meng2021-07-28 12:00:23 +0800
committerBin Meng2021-08-02 15:11:40 +0800
commitc79cbb5952068d9f05e4bcc7bdbbc8957fe35c68 (patch)
tree3a15b63c5a64bbc754b58eb7be0b9d2ebc842023 /arch/x86/dts/galileo.dts
parent5824bc6d6fe5f63aa1fb9acbe5ad5aa28d77380f (diff)
x86: dts: Define a default TSC timer frequency
If for some reason, TSC timer frequency cannot be determined from hardware, nor is it specified in the device tree, U-Boot will panic resulting in endless reset during boot. Let's define a default TSC timer frequency using the Kconfig value CONFIG_X86_TSC_TIMER_FREQ (note: #include must be used instead of /include/ otherwise the macro is not pre-processed). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/dts/galileo.dts')
-rw-r--r--arch/x86/dts/galileo.dts7
1 files changed, 2 insertions, 5 deletions
diff --git a/arch/x86/dts/galileo.dts b/arch/x86/dts/galileo.dts
index b5ba1181ddb..4120e8f5c46 100644
--- a/arch/x86/dts/galileo.dts
+++ b/arch/x86/dts/galileo.dts
@@ -11,7 +11,8 @@
/include/ "skeleton.dtsi"
/include/ "reset.dtsi"
/include/ "rtc.dtsi"
-/include/ "tsc_timer.dtsi"
+
+#include "tsc_timer.dtsi"
/ {
model = "Intel Galileo";
@@ -41,10 +42,6 @@
};
};
- tsc-timer {
- clock-frequency = <CONFIG_X86_TSC_TIMER_FREQ>;
- };
-
mrc {
compatible = "intel,quark-mrc";
flags = <MRC_FLAG_SCRAMBLE_EN>;