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authorSimon Glass2019-12-06 21:42:04 -0700
committerBin Meng2019-12-15 11:44:13 +0800
commit506f22497743f943dd0e3f9247451e2c192a5760 (patch)
treea4ab746b9c10595dd352fb6aaddcfb1b3539677b /arch/x86/lib
parent87f1084a630e6dbd5ba9a9747ce185d98ed40658 (diff)
x86: Adjust mrccache_get_region() to support get_mmap()
It is now possible to obtain the memory map for a SPI controllers instead of having it hard-coded in the device tree. Update the code to support this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/lib')
-rw-r--r--arch/x86/lib/mrccache.c18
1 files changed, 14 insertions, 4 deletions
diff --git a/arch/x86/lib/mrccache.c b/arch/x86/lib/mrccache.c
index 50c72bf962f..7136166be60 100644
--- a/arch/x86/lib/mrccache.c
+++ b/arch/x86/lib/mrccache.c
@@ -210,6 +210,9 @@ int mrccache_get_region(struct udevice **devp, struct mrc_region *entry)
{
struct udevice *dev;
ofnode mrc_node;
+ ulong map_base;
+ uint map_size;
+ uint offset;
u32 reg[2];
int ret;
@@ -221,10 +224,15 @@ int mrccache_get_region(struct udevice **devp, struct mrc_region *entry)
ret = uclass_find_first_device(UCLASS_SPI_FLASH, &dev);
if (ret)
return log_msg_ret("Cannot find SPI flash\n", ret);
- ret = dev_read_u32_array(dev, "memory-map", reg, 2);
- if (ret)
- return log_msg_ret("Cannot find memory map\n", ret);
- entry->base = reg[0];
+ ret = dm_spi_get_mmap(dev, &map_base, &map_size, &offset);
+ if (!ret) {
+ entry->base = map_base;
+ } else {
+ ret = dev_read_u32_array(dev, "memory-map", reg, 2);
+ if (ret)
+ return log_msg_ret("Cannot find memory map\n", ret);
+ entry->base = reg[0];
+ }
/* Find the place where we put the MRC cache */
mrc_node = dev_read_subnode(dev, "rw-mrc-cache");
@@ -239,6 +247,8 @@ int mrccache_get_region(struct udevice **devp, struct mrc_region *entry)
if (devp)
*devp = dev;
+ debug("MRC cache in '%s', offset %x, len %x, base %x\n",
+ dev->name, entry->offset, entry->length, entry->base);
return 0;
}