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authorBin Meng2020-03-09 19:35:30 -0700
committerAndes2020-03-17 11:29:54 +0800
commit1b3c8d64020f835823aedc1c4d293e34a78bd1b8 (patch)
tree1f9df90b50ed39cb27423f63f6424b633a2fd4fa /arch/xtensa
parent1e32715602d3da294eaf4e70542c4be65e77a839 (diff)
riscv: Introduce a new config for SBI v0.1
We now have SBI v0.2 which is more scalable and extendable to handle future needs for RISC-V supervisor interfaces. Introduce a new config and move all SBI v0.1 code under that config. This allows to implement the new replacement SBI extensions cleanly and remove v0.1 extensions easily in future. Currently, the config is enabled by default. Once all M-mode software, with v0.1, is no longer in use, this config option and all relevant code can be easily removed. This commit is inspired from Linux kernel patch: https://patchwork.kernel.org/patch/11407361/ Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
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