Merge tag 'xilinx-for-v2019.01' of git://git.denx.de/u-boot-microblaze

Xilinx changes for v2019.01

microblaze:
- Use default functions for memory decoding
- Showing model from DT

zynq:
- Fix spi flash DTs
- Fix zynq_help_text with CONFIG_SYS_LONGHELP
- Tune cse/mini configurations
- Enabling cse/mini testing with current targets

zynqmp:
- Enable gzip SPL support
- Fix chip detection logic
- Tune mini configurations
- DT fixes(spi-flash, models, clocks, etc)
- Add support for OF_SEPARATE configurations
- Enabling mini testing with current targets
- Add mini mtest configuration
- Some minor config setting

nand:
- arasan: Add subpage configuration

net:
- gem: Add 64bit DMA support

19 files changed, 92 insertions, 13 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 96eadb6fd69..eb6ce299f04 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -942,6 +942,7 @@ config ARCH_ZYNQMP
 	select OF_CONTROL
 	select SPL_BOARD_INIT if SPL
 	select SPL_CLK if SPL
+	select SPL_SEPARATE_BSS if SPL
 	select SUPPORT_SPL
 	imply BOARD_LATE_INIT
 	imply CMD_DM
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d8be3a30dc4..c5960d3f928 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -157,6 +157,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
 	zynq-zybo-z7.dtb
 dtb-$(CONFIG_ARCH_ZYNQMP) += \
 	avnet-ultra96-rev1.dtb			\
+	zynqmp-mini.dtb				\
 	zynqmp-mini-emmc0.dtb			\
 	zynqmp-mini-emmc1.dtb			\
 	zynqmp-mini-nand.dtb			\
diff --git a/arch/arm/dts/zynq-cse-qspi-single.dts b/arch/arm/dts/zynq-cse-qspi-single.dts
index 3252d6a4440..0d680dfc068 100644
--- a/arch/arm/dts/zynq-cse-qspi-single.dts
+++ b/arch/arm/dts/zynq-cse-qspi-single.dts
@@ -7,6 +7,6 @@
 
 #include "zynq-cse-qspi.dtsi"
 
-&qspi {
+&flash0 {
 	spi-rx-bus-width = <4>;
 };
diff --git a/arch/arm/dts/zynq-cse-qspi.dtsi b/arch/arm/dts/zynq-cse-qspi.dtsi
index 2b169468b06..65af4081ff4 100644
--- a/arch/arm/dts/zynq-cse-qspi.dtsi
+++ b/arch/arm/dts/zynq-cse-qspi.dtsi
@@ -59,7 +59,7 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 			num-cs = <1>;
-			flash@0 {
+			flash0: flash@0 {
 				compatible = "n25q128a11";
 				reg = <0x0>;
 				spi-tx-bus-width = <1>;
diff --git a/arch/arm/dts/zynqmp-mini-emmc0.dts b/arch/arm/dts/zynqmp-mini-emmc0.dts
index 24dd1ab9df0..2213bb2fdf6 100644
--- a/arch/arm/dts/zynqmp-mini-emmc0.dts
+++ b/arch/arm/dts/zynqmp-mini-emmc0.dts
@@ -10,7 +10,7 @@
 /dts-v1/;
 
 / {
-	model = "ZynqMP MINI EMMC";
+	model = "ZynqMP MINI EMMC0";
 	compatible = "xlnx,zynqmp";
 	#address-cells = <2>;
 	#size-cells = <2>;
@@ -53,6 +53,7 @@
 			status = "disabled";
 			reg = <0x0 0xff160000 0x0 0x1000>;
 			clock-names = "clk_xin", "clk_ahb";
+			clocks = <&clk_xin &clk_xin>;
 			xlnx,device_id = <0>;
 		};
 	};
diff --git a/arch/arm/dts/zynqmp-mini-emmc1.dts b/arch/arm/dts/zynqmp-mini-emmc1.dts
index 530ab3cdc22..0538da468b3 100644
--- a/arch/arm/dts/zynqmp-mini-emmc1.dts
+++ b/arch/arm/dts/zynqmp-mini-emmc1.dts
@@ -10,7 +10,7 @@
 /dts-v1/;
 
 / {
-	model = "ZynqMP MINI EMMC";
+	model = "ZynqMP MINI EMMC1";
 	compatible = "xlnx,zynqmp";
 	#address-cells = <2>;
 	#size-cells = <2>;
diff --git a/arch/arm/dts/zynqmp-mini.dts b/arch/arm/dts/zynqmp-mini.dts
new file mode 100644
index 00000000000..1faee9ec75e
--- /dev/null
+++ b/arch/arm/dts/zynqmp-mini.dts
@@ -0,0 +1,40 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * dts file for Xilinx ZynqMP Mini Configuration
+ *
+ * (C) Copyright 2017, Xilinx, Inc.
+ *
+ * Michal Simek <michal.simek@xilinx.com>
+ */
+
+/dts-v1/;
+
+/ {
+	model = "ZynqMP MINI";
+	compatible = "xlnx,zynqmp";
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	aliases {
+		serial0 = &dcc;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0xfffc0000 0x0 0x40000>, <0x0 0x0 0x0 0x80000000>;
+	};
+
+	dcc: dcc {
+		compatible = "arm,dcc";
+		status = "disabled";
+		u-boot,dm-pre-reloc;
+	};
+};
+
+&dcc {
+	status = "okay";
+};
diff --git a/arch/arm/dts/zynqmp-zc1232-revA.dts b/arch/arm/dts/zynqmp-zc1232-revA.dts
index ea1ca561a16..5c212ba468e 100644
--- a/arch/arm/dts/zynqmp-zc1232-revA.dts
+++ b/arch/arm/dts/zynqmp-zc1232-revA.dts
@@ -41,7 +41,7 @@
 &qspi {
 	status = "okay";
 	flash@0 {
-		compatible = "m25p80"; /* 32MB FIXME */
+		compatible = "m25p80", "spi-flash"; /* 32MB FIXME */
 		#address-cells = <1>;
 		#size-cells = <1>;
 		reg = <0x0>;
diff --git a/arch/arm/dts/zynqmp-zc1254-revA.dts b/arch/arm/dts/zynqmp-zc1254-revA.dts
index 2493883e6f3..881aacc5825 100644
--- a/arch/arm/dts/zynqmp-zc1254-revA.dts
+++ b/arch/arm/dts/zynqmp-zc1254-revA.dts
@@ -41,7 +41,7 @@
 &qspi {
 	status = "okay";
 	flash@0 {
-		compatible = "m25p80"; /* 32MB */
+		compatible = "m25p80", "spi-flash"; /* 32MB */
 		#address-cells = <1>;
 		#size-cells = <1>;
 		reg = <0x0>;
diff --git a/arch/arm/dts/zynqmp-zc1275-revA.dts b/arch/arm/dts/zynqmp-zc1275-revA.dts
index 2543a674ca7..7403f153e44 100644
--- a/arch/arm/dts/zynqmp-zc1275-revA.dts
+++ b/arch/arm/dts/zynqmp-zc1275-revA.dts
@@ -41,7 +41,7 @@
 &qspi {
 	status = "okay";
 	flash@0 {
-		compatible = "m25p80"; /* 32MB */
+		compatible = "m25p80", "spi-flash"; /* 32MB */
 		#address-cells = <1>;
 		#size-cells = <1>;
 		reg = <0x0>;
diff --git a/arch/arm/dts/zynqmp-zc1275-revB.dts b/arch/arm/dts/zynqmp-zc1275-revB.dts
index f694faeeb5c..e84b2da164c 100644
--- a/arch/arm/dts/zynqmp-zc1275-revB.dts
+++ b/arch/arm/dts/zynqmp-zc1275-revB.dts
@@ -42,7 +42,7 @@
 &qspi {
 	status = "okay";
 	flash@0 {
-		compatible = "m25p80"; /* 32MB */
+		compatible = "m25p80", "spi-flash"; /* 32MB */
 		#address-cells = <1>;
 		#size-cells = <1>;
 		reg = <0x0>;
diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
index c794c91de18..9768dfe0446 100644
--- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
+++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
@@ -101,7 +101,7 @@
 &qspi {
 	status = "okay";
 	flash@0 {
-		compatible = "m25p80"; /* Micron MT25QU512ABB8ESF */
+		compatible = "m25p80", "spi-flash"; /* Micron MT25QU512ABB8ESF */
 		#address-cells = <1>;
 		#size-cells = <1>;
 		reg = <0x0>;
diff --git a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts
index fb49b4fcb49..9afbbb63b49 100644
--- a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts
+++ b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts
@@ -177,6 +177,35 @@
 	status = "okay";
 };
 
+&qspi {
+	status = "okay";
+	flash@0 {
+		compatible = "m25p80", "spi-flash"; /* 32MB */
+		#address-cells = <1>;
+		#size-cells = <1>;
+		reg = <0x0>;
+		spi-tx-bus-width = <1>;
+		spi-rx-bus-width = <4>; /* also DUAL configuration possible */
+		spi-max-frequency = <108000000>; /* Based on DC1 spec */
+		partition@qspi-fsbl-uboot { /* for testing purpose */
+			label = "qspi-fsbl-uboot";
+			reg = <0x0 0x100000>;
+		};
+		partition@qspi-linux { /* for testing purpose */
+			label = "qspi-linux";
+			reg = <0x100000 0x500000>;
+		};
+		partition@qspi-device-tree { /* for testing purpose */
+			label = "qspi-device-tree";
+			reg = <0x600000 0x20000>;
+		};
+		partition@qspi-rootfs { /* for testing purpose */
+			label = "qspi-rootfs";
+			reg = <0x620000 0x5E0000>;
+		};
+	};
+};
+
 &rtc {
 	status = "okay";
 };
diff --git a/arch/arm/dts/zynqmp-zcu100-revC.dts b/arch/arm/dts/zynqmp-zcu100-revC.dts
index 2fffe177b58..05491e9bbc0 100644
--- a/arch/arm/dts/zynqmp-zcu100-revC.dts
+++ b/arch/arm/dts/zynqmp-zcu100-revC.dts
@@ -104,6 +104,7 @@
 
 	ltc2954: ltc2954 { /* U7 */
 		compatible = "lltc,ltc2954", "lltc,ltc2952";
+		status = "disabled";
 		trigger-gpios = <&gpio 26 GPIO_ACTIVE_LOW>; /* INT line - input */
 		/* If there is HW watchdog on mezzanine this signal should be connected there */
 		watchdog-gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; /* MIO on PAD */
diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts
index ac7035fde76..05be919f6f9 100644
--- a/arch/arm/dts/zynqmp-zcu102-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu102-revA.dts
@@ -422,6 +422,7 @@
 				temperature-stability = <50>;
 				factory-fout = <300000000>;
 				clock-frequency = <300000000>;
+				clock-output-names = "si570_user";
 			};
 		};
 		i2c@3 {
@@ -435,6 +436,7 @@
 				temperature-stability = <50>; /* copy from zc702 */
 				factory-fout = <156250000>;
 				clock-frequency = <148500000>;
+				clock-output-names = "si570_mgt";
 			};
 		};
 		i2c@4 {
diff --git a/arch/arm/dts/zynqmp-zcu104-revA.dts b/arch/arm/dts/zynqmp-zcu104-revA.dts
index 6a4b701ab81..431dff52fe6 100644
--- a/arch/arm/dts/zynqmp-zcu104-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu104-revA.dts
@@ -169,7 +169,7 @@
 &qspi {
 	status = "okay";
 	flash@0 {
-		compatible = "m25p80"; /* n25q512a 128MiB */
+		compatible = "m25p80", "spi-flash"; /* n25q512a 128MiB */
 		#address-cells = <1>;
 		#size-cells = <1>;
 		reg = <0x0>;
diff --git a/arch/arm/dts/zynqmp-zcu104-revC.dts b/arch/arm/dts/zynqmp-zcu104-revC.dts
index fe742b894b8..becc6a0fe1e 100644
--- a/arch/arm/dts/zynqmp-zcu104-revC.dts
+++ b/arch/arm/dts/zynqmp-zcu104-revC.dts
@@ -175,7 +175,7 @@
 &qspi {
 	status = "okay";
 	flash@0 {
-		compatible = "m25p80"; /* n25q512a 128MiB */
+		compatible = "m25p80", "spi-flash"; /* n25q512a 128MiB */
 		#address-cells = <1>;
 		#size-cells = <1>;
 		reg = <0x0>;
diff --git a/arch/arm/dts/zynqmp-zcu106-revA.dts b/arch/arm/dts/zynqmp-zcu106-revA.dts
index a30268b7b11..7735e9d2c8b 100644
--- a/arch/arm/dts/zynqmp-zcu106-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu106-revA.dts
@@ -395,6 +395,7 @@
 				temperature-stability = <50>;
 				factory-fout = <300000000>;
 				clock-frequency = <300000000>;
+				clock-output-names = "si570_user";
 			};
 		};
 		i2c@3 {
@@ -408,6 +409,7 @@
 				temperature-stability = <50>; /* copy from zc702 */
 				factory-fout = <156250000>;
 				clock-frequency = <148500000>;
+				clock-output-names = "si570_mgt";
 			};
 		};
 		i2c@4 {
@@ -512,7 +514,7 @@
 	status = "okay";
 	is-dual = <1>;
 	flash@0 {
-		compatible = "m25p80"; /* 32MB */
+		compatible = "m25p80", "spi-flash"; /* 32MB */
 		#address-cells = <1>;
 		#size-cells = <1>;
 		reg = <0x0>;
diff --git a/arch/arm/dts/zynqmp-zcu111-revA.dts b/arch/arm/dts/zynqmp-zcu111-revA.dts
index 6c1a0f7a3b3..172e6cc2ca0 100644
--- a/arch/arm/dts/zynqmp-zcu111-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu111-revA.dts
@@ -318,6 +318,7 @@
 				temperature-stability = <50>;
 				factory-fout = <300000000>;
 				clock-frequency = <300000000>;
+				clock-output-names = "si570_user";
 			};
 		};
 		i2c@3 {
@@ -331,6 +332,7 @@
 				temperature-stability = <50>;
 				factory-fout = <156250000>;
 				clock-frequency = <148500000>;
+				clock-output-names = "si570_mgt";
 			};
 		};
 		i2c@4 {
@@ -449,7 +451,7 @@
 	status = "okay";
 	is-dual = <1>;
 	flash@0 {
-		compatible = "m25p80"; /* 32MB */
+		compatible = "m25p80", "spi-flash"; /* 32MB */
 		#address-cells = <1>;
 		#size-cells = <1>;
 		reg = <0x0>;