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authorWeijie Gao2023-07-19 17:17:27 +0800
committerTom Rini2023-08-03 09:40:50 -0400
commit118855e859a075907aad0b36aa8d8fa6874a35c1 (patch)
tree1ebc850da9efe175ada1b02c9f2f975f517ed852 /arch
parent585a1a44ee009ee27992a973057ab9b2c676386d (diff)
arm: dts: mediatek: add infracfg registers to support GMAC/USB3 Co-PHY
This patch adds infracfg to eth node to support enabling GMAC2. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/dts/mt7981.dtsi7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/dts/mt7981.dtsi b/arch/arm/dts/mt7981.dtsi
index 2053e2ca002..7aaa7770f83 100644
--- a/arch/arm/dts/mt7981.dtsi
+++ b/arch/arm/dts/mt7981.dtsi
@@ -237,6 +237,7 @@
reset-names = "fe";
mediatek,ethsys = <&ethsys>;
mediatek,sgmiisys = <&sgmiisys0>;
+ mediatek,infracfg = <&topmisc>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -255,6 +256,12 @@
#clock-cells = <1>;
};
+ topmisc: topmisc@11d10000 {
+ compatible = "mediatek,mt7981-topmisc", "syscon";
+ reg = <0x11d10000 0x10000>;
+ #clock-cells = <1>;
+ };
+
spi0: spi@1100a000 {
compatible = "mediatek,ipm-spi";
reg = <0x1100a000 0x100>;