diff options
| author | Peng Fan | 2020-07-09 11:18:50 +0800 |
|---|---|---|
| committer | Peng Fan | 2020-07-14 15:23:47 +0800 |
| commit | 14254e646d7415bbdaa21cf606dda6143eb51f87 (patch) | |
| tree | 8c1d1a455c419c6a19c889e565cf0ec8cb439129 /arch | |
| parent | 46a8a28bf60bde07e6c3b5c44a77af2544d8aee9 (diff) | |
imx8m: configure NoC clk
Configure NoC clk for better system performance
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-imx/imx8m/clock_imx8mm.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c b/arch/arm/mach-imx/imx8m/clock_imx8mm.c index 6ab75f0e2c4..0a8208606d1 100644 --- a/arch/arm/mach-imx/imx8m/clock_imx8mm.c +++ b/arch/arm/mach-imx/imx8m/clock_imx8mm.c @@ -353,11 +353,24 @@ int clock_init(void) /* Bypass CCM A53 ROOT, Switch to ARM PLL -> MUX-> CPU */ clock_set_target_val(CORE_SEL_CFG, CLK_ROOT_SOURCE_SEL(1)); + if (is_imx8mn() || is_imx8mp()) + intpll_configure(ANATOP_SYSTEM_PLL3, MHZ(600)); + else + intpll_configure(ANATOP_SYSTEM_PLL3, MHZ(750)); + +#ifdef CONFIG_IMX8MP + /* 8MP ROM already set NOC to 800Mhz, only need to configure NOC_IO clk to 600Mhz */ + /* 8MP ROM already set GIC to 400Mhz, system_pll1_800m with div = 2 */ + clock_set_target_val(NOC_IO_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(2)); +#else + clock_set_target_val(NOC_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(2)); + /* config GIC to sys_pll2_100m */ clock_enable(CCGR_GIC, 0); clock_set_target_val(GIC_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(3)); clock_enable(CCGR_GIC, 1); +#endif clock_set_target_val(NAND_USDHC_BUS_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(1)); |