diff options
author | Dave Gerlach | 2022-03-17 12:03:45 -0500 |
---|---|---|
committer | Tom Rini | 2022-04-04 19:02:04 -0400 |
commit | 1a40ddffecf6ded31d9a5d1a5bbd750aa28e4cf2 (patch) | |
tree | 3c03c275772fbd7cb09655b460cb86cc5e7237c9 /arch | |
parent | 7ffcff277d13614023feb26356cf17647ac39db9 (diff) |
arm: dts: k3-am64-ddr: Add ss_cfg reg entry
Add 'ss_cfg' memory region for memorycontroller node which is required
to enable ECC.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/dts/k3-am64-ddr.dtsi | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/dts/k3-am64-ddr.dtsi b/arch/arm/dts/k3-am64-ddr.dtsi index 026a547f0e3..8324b389e06 100644 --- a/arch/arm/dts/k3-am64-ddr.dtsi +++ b/arch/arm/dts/k3-am64-ddr.dtsi @@ -7,8 +7,9 @@ memorycontroller: memorycontroller@f300000 { compatible = "ti,am64-ddrss"; reg = <0x00 0x0f308000 0x00 0x4000>, - <0x00 0x43014000 0x00 0x100>; - reg-names = "cfg", "ctrl_mmr_lp4"; + <0x00 0x43014000 0x00 0x100>, + <0x00 0x0f300000 0x00 0x200>; + reg-names = "cfg", "ctrl_mmr_lp4", "ss_cfg"; power-domains = <&k3_pds 138 TI_SCI_PD_SHARED>, <&k3_pds 55 TI_SCI_PD_SHARED>; clocks = <&k3_clks 138 0>, <&k3_clks 16 4>; |