diff options
author | Guillaume GARDET | 2019-01-02 14:31:41 +0100 |
---|---|---|
committer | Minkyu Kang | 2019-01-03 09:37:18 +0900 |
commit | 2a195703d6e62172e532ffae05a79e9d12f602bc (patch) | |
tree | 64f911bf99868b73465c370f8a335c04c57c2dfa /arch | |
parent | c96d90367a6a229210b8b16681cfe9e5c8aeced1 (diff) |
exynos: allow SPL to build in thumb mode
Building peach-pi smdk5420 and peach-pit with thumb mode for SPL
ends-up in the following error:
Error: Thumb encoding does not support an immediate here -- `msr cpsr_c,#0x13|0xC0'
Use an intermediate register to be able to use thumb for exynos5 SPL.
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-exynos/include/mach/system.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mach-exynos/include/mach/system.h b/arch/arm/mach-exynos/include/mach/system.h index 48377819573..81fa9800b41 100644 --- a/arch/arm/mach-exynos/include/mach/system.h +++ b/arch/arm/mach-exynos/include/mach/system.h @@ -58,7 +58,8 @@ struct exynos5_sysreg { /* Move 0xd3 value to CPSR register to enable SVC mode */ #define svc32_mode_en() __asm__ __volatile__ \ ("@ I&F disable, Mode: 0x13 - SVC\n\t" \ - "msr cpsr_c, #0x13|0xC0\n\t" : : ) + "mov r0, #0x13|0xC0\n\t" \ + "msr cpsr_c, r0\n\t" : : ) /* Set program counter with the given value */ #define set_pc(x) __asm__ __volatile__ ("mov pc, %0\n\t" : : "r"(x)) |