diff options
author | Jonas Karlman | 2023-02-22 22:44:41 +0000 |
---|---|---|
committer | Kever Yang | 2023-02-28 18:07:28 +0800 |
commit | 2eedb6d93fcbb5a2038c687faada51bb92aec6ea (patch) | |
tree | 06949568edd28df52b237a4f51bff9d8f7bdeb37 /arch | |
parent | 628fb0683b65269a121c1cbc3a0d4f5adb4ecf13 (diff) |
rockchip: rk3568: Read cpuid from otp
The cpuid on RK3568 is located at 0xa instead of 0x7 as all other SoCs.
Add and use a CFG_CPUID_OFFSET to define this offset.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/dts/rk356x-u-boot.dtsi | 12 | ||||
-rw-r--r-- | arch/arm/mach-rockchip/Kconfig | 2 | ||||
-rw-r--r-- | arch/arm/mach-rockchip/board.c | 2 |
3 files changed, 15 insertions, 1 deletions
diff --git a/arch/arm/dts/rk356x-u-boot.dtsi b/arch/arm/dts/rk356x-u-boot.dtsi index 4e2d059fcf7..23316410496 100644 --- a/arch/arm/dts/rk356x-u-boot.dtsi +++ b/arch/arm/dts/rk356x-u-boot.dtsi @@ -20,6 +20,18 @@ u-boot,dm-pre-reloc; status = "okay"; }; + + otp: nvmem@fe38c000 { + compatible = "rockchip,rk3568-otp"; + reg = <0x0 0xfe38c000 0x0 0x4000>; + #address-cells = <1>; + #size-cells = <1>; + status = "okay"; + + cpu_id: id@a { + reg = <0x0a 0x10>; + }; + }; }; &combphy1 { diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 26ba9deff8a..88be06811c5 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -289,6 +289,8 @@ config ROCKCHIP_RK3568 select DM_REGULATOR_FIXED select DM_RESET imply ROCKCHIP_COMMON_BOARD + imply ROCKCHIP_OTP + imply MISC_INIT_R help The Rockchip RK3568 is a ARM-based SoC with quad-core Cortex-A55, including NEON and GPU, 512K L3 cache, Mali-G52 based graphics, diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c index ebffb6c3ff0..f1f70c81d0c 100644 --- a/arch/arm/mach-rockchip/board.c +++ b/arch/arm/mach-rockchip/board.c @@ -323,7 +323,7 @@ int fastboot_set_reboot_flag(enum fastboot_reboot_reason reason) #ifdef CONFIG_MISC_INIT_R __weak int misc_init_r(void) { - const u32 cpuid_offset = 0x7; + const u32 cpuid_offset = CFG_CPUID_OFFSET; const u32 cpuid_length = 0x10; u8 cpuid[cpuid_length]; int ret; |