diff options
| author | Marek Vasut | 2022-04-13 00:41:52 +0200 |
|---|---|---|
| committer | Stefano Babic | 2022-04-13 09:35:33 +0200 |
| commit | 2fa763baa1c594c74473063292efd37e6e541ea4 (patch) | |
| tree | f83ad2422a74d1c0ff658bc4436f888509e2a37a /arch | |
| parent | 87f958810fcb534cd111028e97a2290226b738b7 (diff) | |
ARM: imx: Enable instruction cache early on on i.MX8M
Enable instruction cache early on to speed up the boot process on i.MX8M.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-imx/imx8m/soc.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index 75559e3b799..ef5add0e658 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -551,6 +551,11 @@ EVENT_SPY(EVT_DM_POST_INIT, imx8m_check_clock); int arch_cpu_init(void) { struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; + +#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF) + icache_enable(); +#endif + /* * ROM might disable clock for SCTR, * enable the clock before timer_init. |