i2c: Add a DM_I2C driver for the sun8i RSB controller

This bus controller is used to communicate with an X-Powers AXP PMIC.
Currently, various drivers access PMIC registers through a platform-
specific non-DM "pmic_bus" interface, which depends on the legacy I2C
framework. In order to convert those drivers to use DM_PMIC, this bus
needs a DM_I2C driver.

Refactor the rsb functions to take the base address as a parameter,
and implement both the existing interface (which is still needed in
SPL) and the DM_I2C interface on top of them.

The register for switching between I2C/P2WI/RSB mode is the same across
all PMIC variants, so move that to the common header.

There are only a couple of pairs of hardware/runtime addresses used
across all PMIC variants. So far the code expected only the "primary"
pair, but some PMICs like the AXP305 and AXP805 use the secondary pair,
so add support for that to the DM driver as well.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

4 files changed, 11 insertions, 194 deletions

diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index f4a45284bdc..10401d3249a 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -100,14 +100,6 @@ config AXP_PMIC_BUS
 	  Select this PMIC bus access helpers for Sunxi platform PRCM or other
 	  AXP family PMIC devices.
 
-config SUN8I_RSB
-	bool "Allwinner sunXi Reduced Serial Bus Driver"
-	help
-	  Say y here to enable support for Allwinner's Reduced Serial Bus
-	  (RSB) support. This controller is responsible for communicating
-	  with various RSB based devices, such as AXP223, AXP8XX PMICs,
-	  and AC100/AC200 ICs.
-
 config SUNXI_SRAM_ADDRESS
 	hex
 	default 0x10000 if MACH_SUN9I || MACH_SUN50I || MACH_SUN50I_H5
@@ -250,9 +242,10 @@ config MACH_SUN8I_A23
 	select ARCH_SUPPORT_PSCI
 	select DRAM_SUN8I_A23
 	select PHY_SUN4I_USB
-	select SUN8I_RSB
+	select SPL_I2C
 	select SUNXI_GEN_SUN6I
 	select SUPPORT_SPL
+	select SYS_I2C_SUN8I_RSB
 	select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
 	imply CONS_INDEX_5 if !DM_SERIAL
 
@@ -264,9 +257,10 @@ config MACH_SUN8I_A33
 	select ARCH_SUPPORT_PSCI
 	select DRAM_SUN8I_A33
 	select PHY_SUN4I_USB
-	select SUN8I_RSB
+	select SPL_I2C
 	select SUNXI_GEN_SUN6I
 	select SUPPORT_SPL
+	select SYS_I2C_SUN8I_RSB
 	select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
 	imply CONS_INDEX_5 if !DM_SERIAL
 
@@ -275,11 +269,12 @@ config MACH_SUN8I_A83T
 	select CPU_V7A
 	select DRAM_SUN8I_A83T
 	select PHY_SUN4I_USB
-	select SUN8I_RSB
+	select SPL_I2C
 	select SUNXI_GEN_SUN6I
 	select MMC_SUNXI_HAS_NEW_MODE
 	select MMC_SUNXI_HAS_MODE_SWITCH
 	select SUPPORT_SPL
+	select SYS_I2C_SUN8I_RSB
 
 config MACH_SUN8I_H3
 	bool "sun8i (Allwinner H3)"
@@ -320,6 +315,7 @@ config MACH_SUN9I
 	bool "sun9i (Allwinner A80)"
 	select CPU_V7A
 	select DRAM_SUN9I
+	select SPL_I2C
 	select SUN6I_PRCM
 	select SUNXI_GEN_SUN6I
 	select SUPPORT_SPL
diff --git a/arch/arm/mach-sunxi/Makefile b/arch/arm/mach-sunxi/Makefile
index c9312bb3934..5d3fd70f749 100644
--- a/arch/arm/mach-sunxi/Makefile
+++ b/arch/arm/mach-sunxi/Makefile
@@ -13,7 +13,6 @@ obj-y	+= dram_helpers.o
 obj-y	+= pinmux.o
 obj-$(CONFIG_SUN6I_PRCM)	+= prcm.o
 obj-$(CONFIG_AXP_PMIC_BUS)	+= pmic_bus.o
-obj-$(CONFIG_SUN8I_RSB)		+= rsb.o
 obj-$(CONFIG_MACH_SUN4I)	+= clock_sun4i.o
 obj-$(CONFIG_MACH_SUN5I)	+= clock_sun4i.o
 obj-$(CONFIG_MACH_SUN6I)	+= clock_sun6i.o
diff --git a/arch/arm/mach-sunxi/pmic_bus.c b/arch/arm/mach-sunxi/pmic_bus.c
index 673a05fdd16..827797249ea 100644
--- a/arch/arm/mach-sunxi/pmic_bus.c
+++ b/arch/arm/mach-sunxi/pmic_bus.c
@@ -23,10 +23,6 @@
 
 #define AXP221_CHIP_ADDR		0x68
 
-/* AXP818 device and runtime addresses are same as AXP223 */
-#define AXP223_DEVICE_ADDR		0x3a3
-#define AXP223_RUNTIME_ADDR		0x2d
-
 int pmic_bus_init(void)
 {
 	/* This cannot be 0 because it is used in SPL before BSS is ready */
@@ -49,7 +45,8 @@ int pmic_bus_init(void)
 	if (ret)
 		return ret;
 
-	ret = rsb_set_device_address(AXP223_DEVICE_ADDR, AXP223_RUNTIME_ADDR);
+	ret = rsb_set_device_address(AXP_PMIC_PRI_DEVICE_ADDR,
+				     AXP_PMIC_PRI_RUNTIME_ADDR);
 # endif
 	if (ret)
 		return ret;
@@ -73,7 +70,7 @@ int pmic_bus_read(u8 reg, u8 *data)
 # elif defined CONFIG_MACH_SUN8I_R40
 	return i2c_read(AXP209_I2C_ADDR, reg, 1, data, 1);
 # else
-	return rsb_read(AXP223_RUNTIME_ADDR, reg, data);
+	return rsb_read(AXP_PMIC_PRI_RUNTIME_ADDR, reg, data);
 # endif
 #endif
 }
@@ -92,7 +89,7 @@ int pmic_bus_write(u8 reg, u8 data)
 # elif defined CONFIG_MACH_SUN8I_R40
 	return i2c_write(AXP209_I2C_ADDR, reg, 1, &data, 1);
 # else
-	return rsb_write(AXP223_RUNTIME_ADDR, reg, data);
+	return rsb_write(AXP_PMIC_PRI_RUNTIME_ADDR, reg, data);
 # endif
 #endif
 }
diff --git a/arch/arm/mach-sunxi/rsb.c b/arch/arm/mach-sunxi/rsb.c
deleted file mode 100644
index 01bb09b7478..00000000000
--- a/arch/arm/mach-sunxi/rsb.c
+++ /dev/null
@@ -1,175 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2014 Hans de Goede <hdegoede@redhat.com>
- *
- * Based on allwinner u-boot sources rsb code which is:
- * (C) Copyright 2007-2013
- * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
- * lixiang <lixiang@allwinnertech.com>
- */
-
-#include <common.h>
-#include <errno.h>
-#include <time.h>
-#include <asm/arch/cpu.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/prcm.h>
-#include <asm/arch/rsb.h>
-
-static int rsb_set_device_mode(void);
-
-static void rsb_cfg_io(void)
-{
-#ifdef CONFIG_MACH_SUN8I
-	sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN8I_GPL_R_RSB);
-	sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUN8I_GPL_R_RSB);
-	sunxi_gpio_set_pull(SUNXI_GPL(0), 1);
-	sunxi_gpio_set_pull(SUNXI_GPL(1), 1);
-	sunxi_gpio_set_drv(SUNXI_GPL(0), 2);
-	sunxi_gpio_set_drv(SUNXI_GPL(1), 2);
-#elif defined CONFIG_MACH_SUN9I
-	sunxi_gpio_set_cfgpin(SUNXI_GPN(0), SUN9I_GPN_R_RSB);
-	sunxi_gpio_set_cfgpin(SUNXI_GPN(1), SUN9I_GPN_R_RSB);
-	sunxi_gpio_set_pull(SUNXI_GPN(0), 1);
-	sunxi_gpio_set_pull(SUNXI_GPN(1), 1);
-	sunxi_gpio_set_drv(SUNXI_GPN(0), 2);
-	sunxi_gpio_set_drv(SUNXI_GPN(1), 2);
-#else
-#error unsupported MACH_SUNXI
-#endif
-}
-
-static void rsb_set_clk(void)
-{
-	struct sunxi_rsb_reg * const rsb =
-		(struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
-	u32 div = 0;
-	u32 cd_odly = 0;
-
-	/* Source is Hosc24M, set RSB clk to 3Mhz */
-	div = 24000000 / 3000000 / 2 - 1;
-	cd_odly = div >> 1;
-	if (!cd_odly)
-		cd_odly = 1;
-
-	writel((cd_odly << 8) | div, &rsb->ccr);
-}
-
-int rsb_init(void)
-{
-	struct sunxi_rsb_reg * const rsb =
-		(struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
-
-	/* Enable RSB and PIO clk, and de-assert their resets */
-	prcm_apb0_enable(PRCM_APB0_GATE_PIO | PRCM_APB0_GATE_RSB);
-
-	/* Setup external pins */
-	rsb_cfg_io();
-
-	writel(RSB_CTRL_SOFT_RST, &rsb->ctrl);
-	rsb_set_clk();
-
-	return rsb_set_device_mode();
-}
-
-static int rsb_await_trans(void)
-{
-	struct sunxi_rsb_reg * const rsb =
-		(struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
-	unsigned long tmo = timer_get_us() + 1000000;
-	u32 stat;
-	int ret;
-
-	while (1) {
-		stat = readl(&rsb->stat);
-		if (stat & RSB_STAT_LBSY_INT) {
-			ret = -EBUSY;
-			break;
-		}
-		if (stat & RSB_STAT_TERR_INT) {
-			ret = -EIO;
-			break;
-		}
-		if (stat & RSB_STAT_TOVER_INT) {
-			ret = 0;
-			break;
-		}
-		if (timer_get_us() > tmo) {
-			ret = -ETIME;
-			break;
-		}
-	}
-	writel(stat, &rsb->stat); /* Clear status bits */
-
-	return ret;
-}
-
-static int rsb_set_device_mode(void)
-{
-	struct sunxi_rsb_reg * const rsb =
-		(struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
-	unsigned long tmo = timer_get_us() + 1000000;
-
-	writel(RSB_DMCR_DEVICE_MODE_START | RSB_DMCR_DEVICE_MODE_DATA,
-	       &rsb->dmcr);
-
-	while (readl(&rsb->dmcr) & RSB_DMCR_DEVICE_MODE_START) {
-		if (timer_get_us() > tmo)
-			return -ETIME;
-	}
-
-	return rsb_await_trans();
-}
-
-static int rsb_do_trans(void)
-{
-	struct sunxi_rsb_reg * const rsb =
-		(struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
-
-	setbits_le32(&rsb->ctrl, RSB_CTRL_START_TRANS);
-	return rsb_await_trans();
-}
-
-int rsb_set_device_address(u16 device_addr, u16 runtime_addr)
-{
-	struct sunxi_rsb_reg * const rsb =
-		(struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
-
-	writel(RSB_DEVADDR_RUNTIME_ADDR(runtime_addr) |
-	       RSB_DEVADDR_DEVICE_ADDR(device_addr), &rsb->devaddr);
-	writel(RSB_CMD_SET_RTSADDR, &rsb->cmd);
-
-	return rsb_do_trans();
-}
-
-int rsb_write(const u16 runtime_device_addr, const u8 reg_addr, u8 data)
-{
-	struct sunxi_rsb_reg * const rsb =
-		(struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
-
-	writel(RSB_DEVADDR_RUNTIME_ADDR(runtime_device_addr), &rsb->devaddr);
-	writel(reg_addr, &rsb->addr);
-	writel(data, &rsb->data);
-	writel(RSB_CMD_BYTE_WRITE, &rsb->cmd);
-
-	return rsb_do_trans();
-}
-
-int rsb_read(const u16 runtime_device_addr, const u8 reg_addr, u8 *data)
-{
-	struct sunxi_rsb_reg * const rsb =
-		(struct sunxi_rsb_reg *)SUNXI_RSB_BASE;
-	int ret;
-
-	writel(RSB_DEVADDR_RUNTIME_ADDR(runtime_device_addr), &rsb->devaddr);
-	writel(reg_addr, &rsb->addr);
-	writel(RSB_CMD_BYTE_READ, &rsb->cmd);
-
-	ret = rsb_do_trans();
-	if (ret)
-		return ret;
-
-	*data = readl(&rsb->data) & 0xff;
-
-	return 0;
-}