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authorTom Rini2021-09-01 07:52:08 -0400
committerTom Rini2021-09-01 10:11:21 -0400
commit48cf96fbdf9cf70c4f249c0207ce57c7dff4dd55 (patch)
treec869edaf6a47bc8b5c864a8901c0312a8ac90546 /arch
parentb15a17be0c75238e7bdb2c9baf0c375040d95952 (diff)
parent4116a0f38a8ba6bc5e762cd291a65df4946216e7 (diff)
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- mvebu: a38x: Define supported UART baudrates (Pali) - kwbimage: Misc improvements (Pali) - espressobin/turris_mox/turris_omnia: Enable some more devices like SATA via PCIe, SATA & NVMe (Pali) - a37xx: Remove unused CONFIG_DEBUG_UART_SHIFT options (Pali) - turris_omnia: Disable MCU watchdog in SPL when booting over UART (Marek) - kwbimage: Fix some Coverity issue (Heinrich)
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-mvebu/cpu.c60
-rw-r--r--arch/arm/mach-mvebu/include/mach/cpu.h2
-rw-r--r--arch/arm/mach-mvebu/include/mach/soc.h2
-rw-r--r--arch/arm/mach-mvebu/spl.c77
4 files changed, 72 insertions, 69 deletions
diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c
index 0b935c46fb8..0272dd7352d 100644
--- a/arch/arm/mach-mvebu/cpu.c
+++ b/arch/arm/mach-mvebu/cpu.c
@@ -14,6 +14,7 @@
#include <asm/pl310.h>
#include <asm/arch/cpu.h>
#include <asm/arch/soc.h>
+#include <asm/spl.h>
#include <sdhci.h>
#define DDR_BASE_CS_OFF(n) (0x0000 + ((n) << 3))
@@ -80,6 +81,65 @@ int mvebu_soc_family(void)
return MVEBU_SOC_UNKNOWN;
}
+u32 get_boot_device(void)
+{
+ u32 val;
+ u32 boot_device;
+
+ /*
+ * First check, if UART boot-mode is active. This can only
+ * be done, via the bootrom error register. Here the
+ * MSB marks if the UART mode is active.
+ */
+ val = readl(CONFIG_BOOTROM_ERR_REG);
+ boot_device = (val & BOOTROM_ERR_MODE_MASK) >> BOOTROM_ERR_MODE_OFFS;
+ debug("BOOTROM_REG=0x%08x boot_device=0x%x\n", val, boot_device);
+ if (boot_device == BOOTROM_ERR_MODE_UART)
+ return BOOT_DEVICE_UART;
+
+#ifdef CONFIG_ARMADA_38X
+ /*
+ * If the bootrom error code contains any other than zeros it's an
+ * error condition and the bootROM has fallen back to UART boot
+ */
+ boot_device = (val & BOOTROM_ERR_CODE_MASK) >> BOOTROM_ERR_CODE_OFFS;
+ if (boot_device)
+ return BOOT_DEVICE_UART;
+#endif
+
+ /*
+ * Now check the SAR register for the strapped boot-device
+ */
+ val = readl(CONFIG_SAR_REG); /* SAR - Sample At Reset */
+ boot_device = (val & BOOT_DEV_SEL_MASK) >> BOOT_DEV_SEL_OFFS;
+ debug("SAR_REG=0x%08x boot_device=0x%x\n", val, boot_device);
+ switch (boot_device) {
+#ifdef BOOT_FROM_NAND
+ case BOOT_FROM_NAND:
+ return BOOT_DEVICE_NAND;
+#endif
+#ifdef BOOT_FROM_MMC
+ case BOOT_FROM_MMC:
+ case BOOT_FROM_MMC_ALT:
+ return BOOT_DEVICE_MMC1;
+#endif
+ case BOOT_FROM_UART:
+#ifdef BOOT_FROM_UART_ALT
+ case BOOT_FROM_UART_ALT:
+#endif
+ return BOOT_DEVICE_UART;
+#ifdef BOOT_FROM_SATA
+ case BOOT_FROM_SATA:
+ case BOOT_FROM_SATA_ALT:
+ return BOOT_DEVICE_SATA;
+#endif
+ case BOOT_FROM_SPI:
+ return BOOT_DEVICE_SPI;
+ default:
+ return BOOT_DEVICE_BOOTROM;
+ };
+}
+
#if defined(CONFIG_DISPLAY_CPUINFO)
#if defined(CONFIG_ARMADA_375)
diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h b/arch/arm/mach-mvebu/include/mach/cpu.h
index 79858858c25..a7a62c7e7d5 100644
--- a/arch/arm/mach-mvebu/include/mach/cpu.h
+++ b/arch/arm/mach-mvebu/include/mach/cpu.h
@@ -148,6 +148,8 @@ void __noreturn return_to_bootrom(void);
int mv_sdh_init(unsigned long regbase, u32 max_clk, u32 min_clk, u32 quirks);
#endif
+u32 get_boot_device(void);
+
void get_sar_freq(struct sar_freq_modes *sar_freq);
/*
diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h
index 8e8a4058550..aab61f7c15c 100644
--- a/arch/arm/mach-mvebu/include/mach/soc.h
+++ b/arch/arm/mach-mvebu/include/mach/soc.h
@@ -189,7 +189,7 @@
#define BOOT_FROM_SPI 0x3
#define CONFIG_SYS_TCLK 200000000 /* 200MHz */
-#else
+#elif defined(CONFIG_ARMADA_XP)
/* SAR values for Armada XP */
#define CONFIG_SAR_REG (MVEBU_REGISTER(0x18230))
#define CONFIG_SAR2_REG (MVEBU_REGISTER(0x18234))
diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c
index f0cf60bb148..8d6d4902f69 100644
--- a/arch/arm/mach-mvebu/spl.c
+++ b/arch/arm/mach-mvebu/spl.c
@@ -171,74 +171,6 @@ int spl_parse_board_header(struct spl_image_info *spl_image,
return 0;
}
-static u32 get_boot_device(void)
-{
- u32 val;
- u32 boot_device;
-
- /*
- * First check, if UART boot-mode is active. This can only
- * be done, via the bootrom error register. Here the
- * MSB marks if the UART mode is active.
- */
- val = readl(CONFIG_BOOTROM_ERR_REG);
- boot_device = (val & BOOTROM_ERR_MODE_MASK) >> BOOTROM_ERR_MODE_OFFS;
- debug("BOOTROM_REG=0x%08x boot_device=0x%x\n", val, boot_device);
- if (boot_device == BOOTROM_ERR_MODE_UART)
- return BOOT_DEVICE_UART;
-
-#ifdef CONFIG_ARMADA_38X
- /*
- * If the bootrom error code contains any other than zeros it's an
- * error condition and the bootROM has fallen back to UART boot
- */
- boot_device = (val & BOOTROM_ERR_CODE_MASK) >> BOOTROM_ERR_CODE_OFFS;
- if (boot_device)
- return BOOT_DEVICE_UART;
-#endif
-
- /*
- * Now check the SAR register for the strapped boot-device
- */
- val = readl(CONFIG_SAR_REG); /* SAR - Sample At Reset */
- boot_device = (val & BOOT_DEV_SEL_MASK) >> BOOT_DEV_SEL_OFFS;
- debug("SAR_REG=0x%08x boot_device=0x%x\n", val, boot_device);
- switch (boot_device) {
-#ifdef BOOT_FROM_NAND
- case BOOT_FROM_NAND:
- return BOOT_DEVICE_NAND;
-#endif
-#ifdef BOOT_FROM_MMC
- case BOOT_FROM_MMC:
- case BOOT_FROM_MMC_ALT:
- return BOOT_DEVICE_MMC1;
-#endif
- case BOOT_FROM_UART:
-#ifdef BOOT_FROM_UART_ALT
- case BOOT_FROM_UART_ALT:
-#endif
- return BOOT_DEVICE_UART;
-#ifdef BOOT_FROM_SATA
- case BOOT_FROM_SATA:
- case BOOT_FROM_SATA_ALT:
- return BOOT_DEVICE_SATA;
-#endif
- case BOOT_FROM_SPI:
- return BOOT_DEVICE_SPI;
- default:
- return BOOT_DEVICE_BOOTROM;
- };
-}
-
-#else
-
-static u32 get_boot_device(void)
-{
- return BOOT_DEVICE_BOOTROM;
-}
-
-#endif
-
u32 spl_boot_device(void)
{
u32 boot_device = get_boot_device();
@@ -285,6 +217,15 @@ u32 spl_boot_device(void)
}
}
+#else
+
+u32 spl_boot_device(void)
+{
+ return BOOT_DEVICE_BOOTROM;
+}
+
+#endif
+
int board_return_to_bootrom(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev)
{