powerpc: C29X: Move CONFIG_PPC_C29X to Kconfig option

Replace CONFIG_PPC_C29X with ARCH_C29X in Kconfig and clean up existing
macros.

Signed-off-by: York Sun <york.sun@nxp.com>

5 files changed, 13 insertions, 9 deletions

diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 4fd2ea6b6c9..640c846f735 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -33,6 +33,7 @@ config TARGET_BSC9132QDS
 
 config TARGET_C29XPCIE
 	bool "Support C29XPCIE"
+	select ARCH_C29X
 	select SUPPORT_SPL
 	select SUPPORT_TPL
 	select PHYS_64BIT
@@ -185,6 +186,9 @@ config ARCH_BSC9131
 config ARCH_BSC9132
 	bool
 
+config ARCH_C29X
+	bool
+
 config ARCH_MPC8544
 	bool
 
diff --git a/arch/powerpc/cpu/mpc85xx/Makefile b/arch/powerpc/cpu/mpc85xx/Makefile
index e5451122637..bfff58eaad1 100644
--- a/arch/powerpc/cpu/mpc85xx/Makefile
+++ b/arch/powerpc/cpu/mpc85xx/Makefile
@@ -65,7 +65,7 @@ obj-$(CONFIG_SYS_FSL_QORIQ_CHASSIS1) += fsl_corenet_serdes.o
 obj-$(CONFIG_SYS_FSL_QORIQ_CHASSIS2) += fsl_corenet2_serdes.o
 
 # SoC specific SERDES support
-obj-$(CONFIG_PPC_C29X)	+= c29x_serdes.o
+obj-$(CONFIG_ARCH_C29X)	+= c29x_serdes.o
 obj-$(CONFIG_MPC8536) += mpc8536_serdes.o
 obj-$(CONFIG_ARCH_MPC8544) += mpc8544_serdes.o
 obj-$(CONFIG_ARCH_MPC8548) += mpc8548_serdes.o
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index dfea750893a..c2402a8bda2 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -959,7 +959,7 @@ int cpu_init_r(void)
 #ifdef CONFIG_FSL_CAAM
 	sec_init();
 
-#if defined(CONFIG_PPC_C29X)
+#if defined(CONFIG_ARCH_C29X)
 	if ((SVR_SOC_VER(svr) == SVR_C292) ||
 	    (SVR_SOC_VER(svr) == SVR_C293))
 		sec_init_idx(1);
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index 80b3b74601e..77e3f83abad 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -914,7 +914,7 @@ defined(CONFIG_PPC_T1014) || defined(CONFIG_PPC_T1013)
 #define CONFIG_SYS_FSL_SFP_VER_3_0
 
 
-#elif defined(CONFIG_PPC_C29X)
+#elif defined(CONFIG_ARCH_C29X)
 #define CONFIG_MAX_CPUS			1
 #define CONFIG_FSL_SDHC_V2_3
 #define CONFIG_SYS_FSL_NUM_LAWS		12
@@ -955,7 +955,7 @@ defined(CONFIG_PPC_T1014) || defined(CONFIG_PPC_T1013)
 #define CONFIG_SYS_FSL_DDRC_GEN3
 #endif
 
-#if !defined(CONFIG_PPC_C29X)
+#if !defined(CONFIG_ARCH_C29X)
 #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC	1
 #endif
 
diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h
index 74c2959d335..cef9da06ef3 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -2123,7 +2123,7 @@ typedef struct ccsr_gur {
 #ifdef CONFIG_MPC8536
 #define MPC85xx_PORPLLSR_DDR_RATIO	0x3e000000
 #define MPC85xx_PORPLLSR_DDR_RATIO_SHIFT	25
-#elif defined(CONFIG_PPC_C29X)
+#elif defined(CONFIG_ARCH_C29X)
 #define MPC85xx_PORPLLSR_DDR_RATIO	0x00003f00
 #define MPC85xx_PORPLLSR_DDR_RATIO_SHIFT	(9 - ((gur->pordevsr2 \
 					& MPC85xx_PORDEVSR2_DDR_SPD_0) \
@@ -2175,7 +2175,7 @@ typedef struct ccsr_gur {
 #elif defined(CONFIG_ARCH_BSC9132)
 #define MPC85xx_PORDEVSR_IO_SEL		0x00FE0000
 #define MPC85xx_PORDEVSR_IO_SEL_SHIFT	17
-#elif defined(CONFIG_PPC_C29X)
+#elif defined(CONFIG_ARCH_C29X)
 #define MPC85xx_PORDEVSR_IO_SEL		0x00e00000
 #define MPC85xx_PORDEVSR_IO_SEL_SHIFT	21
 #else
@@ -2193,7 +2193,7 @@ typedef struct ccsr_gur {
 #define MPC85xx_PORDEVSR_RIO_DEV_ID	0x00000007
 	u32	pordbgmsr;	/* POR debug mode status */
 	u32	pordevsr2;	/* POR I/O device status 2 */
-#if defined(CONFIG_PPC_C29X)
+#if defined(CONFIG_ARCH_C29X)
 #define MPC85xx_PORDEVSR2_DDR_SPD_0	0x00000008
 #define MPC85xx_PORDEVSR2_DDR_SPD_0_SHIFT	3
 #endif
@@ -2344,7 +2344,7 @@ typedef struct ccsr_gur {
 #define MPC85xx_PMUXCR0_SIM_SEL_MASK	0x0003b000
 #define MPC85xx_PMUXCR0_SIM_SEL		0x00014000
 #endif
-#if defined(CONFIG_PPC_C29X)
+#if defined(CONFIG_ARCH_C29X)
 #define MPC85xx_PMUXCR_SPI_MASK			0x00000300
 #define MPC85xx_PMUXCR_SPI			0x00000000
 #define MPC85xx_PMUXCR_SPI_GPIO			0x00000100
@@ -2964,7 +2964,7 @@ struct ccsr_pman {
 #endif
 #define CONFIG_SYS_MDIO1_OFFSET			0x24000
 #define CONFIG_SYS_MPC85xx_ESDHC_OFFSET		0x2e000
-#if defined(CONFIG_PPC_C29X)
+#if defined(CONFIG_ARCH_C29X)
 #define CONFIG_SYS_FSL_SEC_OFFSET		0x80000
 #define CONFIG_SYS_FSL_JR0_OFFSET               0x81000
 #else