diff options
author | Parthiban Nallathambi | 2019-09-26 15:47:08 +0200 |
---|---|---|
committer | Stefano Babic | 2019-10-08 16:36:36 +0200 |
commit | 6745dac4946656771d320ba6887e863ae64c8b3e (patch) | |
tree | 1ae42b600a262e8a1f337309efd38bd98bfce8ab /arch | |
parent | 904c31fe9f08be73ec17a7b21f9832366af7da18 (diff) |
ARM: dts: pcl063: add usdhc reset pin of eMMC
pcl063 phycore SoM with eMMC also got usdhc reset pin,
add reset pin to pinmux.
Signed-off-by: Parthiban Nallathambi <pn@denx.de>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/dts/pcl063-common.dtsi | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/dts/pcl063-common.dtsi b/arch/arm/dts/pcl063-common.dtsi index 2b14b2dc5fa..b88dde2fb02 100644 --- a/arch/arm/dts/pcl063-common.dtsi +++ b/arch/arm/dts/pcl063-common.dtsi @@ -113,7 +113,7 @@ pinctrl_enet1: enet1grp { fsl,pins = < MX6UL_PAD_GPIO1_IO06__ENET1_MDIO 0x1b0b0 - MX6UL_PAD_GPIO1_IO07__ENET1_MDC 0X1b0b0 + MX6UL_PAD_GPIO1_IO07__ENET1_MDC 0x1b0b0 MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0 MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 @@ -191,6 +191,7 @@ MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170f9 MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170f9 MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170f9 + MX6UL_PAD_NAND_ALE__USDHC2_RESET_B 0x170f9 >; }; }; |