diff options
author | Geert Uytterhoeven | 2022-03-29 14:19:09 +0200 |
---|---|---|
committer | Marek Vasut | 2022-09-02 13:25:01 +0200 |
commit | 68083b897b57309c29039b27d2580e4eb9c6e455 (patch) | |
tree | af27cd8d6815b45182d7b31ad11e2bfbdeaceec2 /arch | |
parent | 33aca1c86856e4cd303dad3701fe7b3589fb805e (diff) |
renesas: Fix RPC-IF compatible values
The compatible values used for device nodes representing Renesas Reduced
Pin Count Interfaces were based on preliminary versions of the Device
Tree Bindings.
Correct them in both DTSi files and drivers, to match the final DT
Bindings.
Note that there are no DT bindings for RPC-IF on RZ/A1 yet, hence the
most logical SoC-specific value is used, without specifying a
family-specific value.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/dts/r7s72100-gr-peach-u-boot.dts | 2 | ||||
-rw-r--r-- | arch/arm/dts/r8a774c0-u-boot.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/dts/r8a77950-u-boot.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/dts/r8a77960-u-boot.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/dts/r8a77965-u-boot.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/dts/r8a77970-u-boot.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/dts/r8a77980-u-boot.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/dts/r8a77990-u-boot.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/dts/r8a77995-u-boot.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/dts/r8a779a0-u-boot.dtsi | 2 |
10 files changed, 10 insertions, 10 deletions
diff --git a/arch/arm/dts/r7s72100-gr-peach-u-boot.dts b/arch/arm/dts/r7s72100-gr-peach-u-boot.dts index 3f532eced23..5b176a9acd7 100644 --- a/arch/arm/dts/r7s72100-gr-peach-u-boot.dts +++ b/arch/arm/dts/r7s72100-gr-peach-u-boot.dts @@ -47,7 +47,7 @@ rpc: spi@ee200000 { - compatible = "renesas,rpc-r7s72100", "renesas,rpc"; + compatible = "renesas,r7s72100-rpc-if"; reg = <0x3fefa000 0x100>, <0x18000000 0x08000000>; bank-width = <2>; num-cs = <1>; diff --git a/arch/arm/dts/r8a774c0-u-boot.dtsi b/arch/arm/dts/r8a774c0-u-boot.dtsi index f50816a360d..d29610676ca 100644 --- a/arch/arm/dts/r8a774c0-u-boot.dtsi +++ b/arch/arm/dts/r8a774c0-u-boot.dtsi @@ -11,7 +11,7 @@ / { soc { rpc: spi@ee200000 { - compatible = "renesas,rcar-gen3-rpc", "renesas,rpc-r8a774c0"; + compatible = "renesas,r8a774c0-rpc-if", "renesas,rcar-gen3-rpc-if"; reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0x04000000>; clocks = <&cpg CPG_MOD 917>; bank-width = <2>; diff --git a/arch/arm/dts/r8a77950-u-boot.dtsi b/arch/arm/dts/r8a77950-u-boot.dtsi index 5e449a3553c..2306c7bab84 100644 --- a/arch/arm/dts/r8a77950-u-boot.dtsi +++ b/arch/arm/dts/r8a77950-u-boot.dtsi @@ -14,7 +14,7 @@ / { soc { rpc: spi@ee200000 { - compatible = "renesas,rpc-r8a7795", "renesas,rpc"; + compatible = "renesas,r8a7795-rpc-if", "renesas,rcar-gen3-rpc-if"; reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>; clocks = <&cpg CPG_MOD 917>; bank-width = <2>; diff --git a/arch/arm/dts/r8a77960-u-boot.dtsi b/arch/arm/dts/r8a77960-u-boot.dtsi index 9013c291f5f..f64e5a416b0 100644 --- a/arch/arm/dts/r8a77960-u-boot.dtsi +++ b/arch/arm/dts/r8a77960-u-boot.dtsi @@ -14,7 +14,7 @@ / { soc { rpc: spi@ee200000 { - compatible = "renesas,rpc-r8a7796", "renesas,rpc"; + compatible = "renesas,r8a7796-rpc-if", "renesas,rcar-gen3-rpc-if"; reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>; clocks = <&cpg CPG_MOD 917>; bank-width = <2>; diff --git a/arch/arm/dts/r8a77965-u-boot.dtsi b/arch/arm/dts/r8a77965-u-boot.dtsi index f3c99ac99cb..c4abcc5a9b7 100644 --- a/arch/arm/dts/r8a77965-u-boot.dtsi +++ b/arch/arm/dts/r8a77965-u-boot.dtsi @@ -14,7 +14,7 @@ / { soc { rpc: spi@ee200000 { - compatible = "renesas,rpc-r8a77965", "renesas,rpc"; + compatible = "renesas,r8a77965-rpc-if", "renesas,rcar-gen3-rpc-if"; reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>; clocks = <&cpg CPG_MOD 917>; bank-width = <2>; diff --git a/arch/arm/dts/r8a77970-u-boot.dtsi b/arch/arm/dts/r8a77970-u-boot.dtsi index 904fc48b228..614caa9e9c2 100644 --- a/arch/arm/dts/r8a77970-u-boot.dtsi +++ b/arch/arm/dts/r8a77970-u-boot.dtsi @@ -14,7 +14,7 @@ / { soc { rpc: spi@ee200000 { - compatible = "renesas,rpc-r8a77970", "renesas,rpc"; + compatible = "renesas,r8a77970-rpc-if", "renesas,rcar-gen3-rpc-if"; reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>; clocks = <&cpg CPG_MOD 917>; bank-width = <2>; diff --git a/arch/arm/dts/r8a77980-u-boot.dtsi b/arch/arm/dts/r8a77980-u-boot.dtsi index 34d6fcd2f01..54f01c926dc 100644 --- a/arch/arm/dts/r8a77980-u-boot.dtsi +++ b/arch/arm/dts/r8a77980-u-boot.dtsi @@ -14,7 +14,7 @@ / { soc { rpc: spi@ee200000 { - compatible = "renesas,rpc-r8a77980", "renesas,rpc"; + compatible = "renesas,r8a77980-rpc-if", "renesas,rcar-gen3-rpc-if"; reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>; clocks = <&cpg CPG_MOD 917>; bank-width = <2>; diff --git a/arch/arm/dts/r8a77990-u-boot.dtsi b/arch/arm/dts/r8a77990-u-boot.dtsi index 8c75f62f5ab..50bbbe18647 100644 --- a/arch/arm/dts/r8a77990-u-boot.dtsi +++ b/arch/arm/dts/r8a77990-u-boot.dtsi @@ -10,7 +10,7 @@ / { soc { rpc: spi@ee200000 { - compatible = "renesas,rpc-r8a77990", "renesas,rpc"; + compatible = "renesas,r8a77990-rpc-if", "renesas,rcar-gen3-rpc-if"; reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>; clocks = <&cpg CPG_MOD 917>; bank-width = <2>; diff --git a/arch/arm/dts/r8a77995-u-boot.dtsi b/arch/arm/dts/r8a77995-u-boot.dtsi index cd9466625e2..347b59ac42c 100644 --- a/arch/arm/dts/r8a77995-u-boot.dtsi +++ b/arch/arm/dts/r8a77995-u-boot.dtsi @@ -10,7 +10,7 @@ / { soc { rpc: spi@ee200000 { - compatible = "renesas,rpc-r8a77995", "renesas,rpc"; + compatible = "renesas,r8a77995-rpc-if", "renesas,rcar-gen3-rpc-if"; reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>; clocks = <&cpg CPG_MOD 917>; bank-width = <2>; diff --git a/arch/arm/dts/r8a779a0-u-boot.dtsi b/arch/arm/dts/r8a779a0-u-boot.dtsi index 83dbe3f20ef..9f2772a9485 100644 --- a/arch/arm/dts/r8a779a0-u-boot.dtsi +++ b/arch/arm/dts/r8a779a0-u-boot.dtsi @@ -10,7 +10,7 @@ / { soc { rpc: spi@ee200000 { - compatible = "renesas,rpc-r8a779a0", "renesas,rcar-gen3-rpc"; + compatible = "renesas,r8a779a0-rpc-if", "renesas,rcar-gen3-rpc-if"; reg = <0 0xee200000 0 0x200>, <0 0x08000000 0 0x04000000>; clocks = <&cpg CPG_MOD 629>; bank-width = <2>; |