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authorTom Rini2022-01-17 08:36:12 -0500
committerTom Rini2022-01-17 08:36:12 -0500
commit6d2ebcd7be3e7f9cc81011ddb97540c81a301701 (patch)
treef7e2121a624292cb900d085254dd6336d51ff627 /arch
parent34972e7ea6ef2827b7c18feb03ecfe8c952f162e (diff)
parentdbf500b55770e58313df9fefa217129da38ea1b6 (diff)
Merge tag 'u-boot-at91-2022.04-b' of https://source.denx.de/u-boot/custodians/u-boot-at91
Second set of u-boot-at91 features for the 2022.04 cycle: This small feature set includes few changes for sama7g5 and sama7g5ek: turn blue led on at boot, changes required for the Rev4 of the board, better sync with the Linux DT with regards to the new DT nodes.
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/dts/sama7g5.dtsi50
-rw-r--r--arch/arm/dts/sama7g5ek.dts39
2 files changed, 80 insertions, 9 deletions
diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi
index 4a3c675d344..2505a2f83d3 100644
--- a/arch/arm/dts/sama7g5.dtsi
+++ b/arch/arm/dts/sama7g5.dtsi
@@ -10,11 +10,15 @@
*/
#include "skeleton.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clk/at91.h>
+#include <dt-bindings/dma/at91.h>
/ {
model = "Microchip SAMA7G5 family SoC";
compatible = "microchip,sama7g5";
+ interrupt-parent = <&gic>;
clocks {
slow_rc_osc: slow_rc_osc {
@@ -191,6 +195,52 @@
clock-names = "pclk", "hclk";
status = "disabled";
};
+
+ dma0: dma-controller@e2808000 {
+ compatible = "microchip,sama7g5-dma";
+ reg = <0xe2808000 0x1000>;
+ interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
+ clock-names = "dma_clk";
+ status = "disabled";
+ };
+
+ flx8: flexcom@e2818000 {
+ compatible = "atmel,sama5d2-flexcom";
+ reg = <0xe2818000 0x200>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 46>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xe2818000 0x800>;
+ status = "disabled";
+
+ i2c8: i2c@600 {
+ compatible = "microchip,sama7g5-i2c", "microchip,sam9x60-i2c";
+ reg = <0x600 0x200>;
+ interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 46>;
+ atmel,fifo-size = <32>;
+ dmas = <&dma0 AT91_XDMAC_DT_PERID(21)>,
+ <&dma0 AT91_XDMAC_DT_PERID(22)>;
+ dma-names = "rx", "tx";
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ status = "disabled";
+ };
+ };
+
+ gic: interrupt-controller@e8c11000 {
+ compatible = "arm,cortex-a7-gic";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ interrupt-parent;
+ reg = <0xe8c11000 0x1000>,
+ <0xe8c12000 0x2000>;
+ };
};
};
};
diff --git a/arch/arm/dts/sama7g5ek.dts b/arch/arm/dts/sama7g5ek.dts
index 16192ca0b15..6adb0442581 100644
--- a/arch/arm/dts/sama7g5ek.dts
+++ b/arch/arm/dts/sama7g5ek.dts
@@ -20,6 +20,7 @@
aliases {
serial0 = &uart0;
i2c0 = &i2c1;
+ i2c1 = &i2c8;
};
chosen {
@@ -92,17 +93,31 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flx1_default>;
status = "okay";
+};
- eeprom@52 {
- compatible = "microchip,24aa02e48";
- reg = <0x52>;
- pagesize = <16>;
- };
+&flx8 {
+ atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
+ status = "okay";
+
+ i2c8: i2c@600 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c8_default>;
+ i2c-analog-filter;
+ i2c-digital-filter;
+ i2c-digital-filter-width-ns = <35>;
+ status = "okay";
- eeprom@53 {
- compatible = "microchip,24aa02e48";
- reg = <0x53>;
- pagesize = <16>;
+ eeprom@52 {
+ compatible = "microchip,24aa02e48";
+ reg = <0x52>;
+ pagesize = <16>;
+ };
+
+ eeprom@53 {
+ compatible = "microchip,24aa02e48";
+ reg = <0x53>;
+ pagesize = <16>;
+ };
};
};
@@ -145,6 +160,12 @@
bias-pull-up;
};
+ pinctrl_i2c8_default: i2c8_default {
+ pinmux = <PIN_PC14__FLEXCOM8_IO0>,
+ <PIN_PC13__FLEXCOM8_IO1>;
+ bias-disable;
+ };
+
pinctrl_qspi: qspi {
pinmux = <PIN_PB12__QSPI0_IO0>,
<PIN_PB11__QSPI0_IO1>,