diff options
author | Tom Rini | 2020-07-29 21:16:08 -0400 |
---|---|---|
committer | Tom Rini | 2020-07-29 21:16:08 -0400 |
commit | 719f42190d5f0238cb01ef2ffba8af2285f7bc7a (patch) | |
tree | c789716a82ab552e0d0c1a9242fda7c41b04c238 /arch | |
parent | 7cb2060b4e63a89c50739dc8a9fcd5d73f86f0be (diff) | |
parent | b9390ce51cb46f4b4acda320e7ea8e0bd120e4b8 (diff) |
Merge tag 'dm-pull-28jul20' of git://git.denx.de/u-boot-dm
Use binman instead of one of the Rockchip build scripts
Refactor to allow any arch to create SPI-flash images
New button uclass
Diffstat (limited to 'arch')
27 files changed, 230 insertions, 128 deletions
diff --git a/arch/Kconfig b/arch/Kconfig index 9be02d1319f..7f3cbe2ec88 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -160,6 +160,7 @@ config X86 select TIMER select USE_PRIVATE_LIBGCC select X86_TSC_TIMER + imply HAS_ROM if X86_RESET_VECTOR imply BLK imply CMD_DM imply CMD_FPGA_LOADMK diff --git a/arch/arm/config.mk b/arch/arm/config.mk index f25603109e0..4153f7e3713 100644 --- a/arch/arm/config.mk +++ b/arch/arm/config.mk @@ -122,7 +122,7 @@ endif ifneq ($(CONFIG_SPL_BUILD),y) # Check that only R_ARM_RELATIVE relocations are generated. -ALL-y += checkarmreloc +INPUTS-y += checkarmreloc # The movt / movw can hardcode 16 bit parts of the addresses in the # instruction. Relocation is not supported for that case, so disable # such usage by requiring word relocations. @@ -154,17 +154,17 @@ endif ifneq ($(CONFIG_IMX_CONFIG),) ifdef CONFIG_SPL ifndef CONFIG_SPL_BUILD -ALL-y += SPL +INPUTS-y += SPL endif else ifeq ($(CONFIG_OF_SEPARATE),y) -ALL-y += u-boot-dtb.imx +INPUTS-y += u-boot-dtb.imx else -ALL-y += u-boot.imx +INPUTS-y += u-boot.imx endif endif ifneq ($(CONFIG_VF610),) -ALL-y += u-boot.vyb +INPUTS-y += u-boot.vyb endif endif diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi index 51b6e018bd7..e3c6c10f130 100644 --- a/arch/arm/dts/rk3288-u-boot.dtsi +++ b/arch/arm/dts/rk3288-u-boot.dtsi @@ -4,6 +4,7 @@ */ #include "rockchip-u-boot.dtsi" +#include "rockchip-optee.dtsi" / { chosen { @@ -12,6 +13,30 @@ }; }; +#ifdef CONFIG_ROCKCHIP_SPI_IMAGE +&binman { + rom { + filename = "u-boot.rom"; + size = <0x400000>; + pad-byte = <0xff>; + + mkimage { + args = "-n rk3288 -T rkspi"; + u-boot-spl { + }; + }; + u-boot-img { + offset = <0x20000>; + }; + u-boot { + offset = <0x300000>; + }; + fdtmap { + }; + }; +}; +#endif + &dmc { u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/rk3399-gru-u-boot.dtsi b/arch/arm/dts/rk3399-gru-u-boot.dtsi index 7bddc3acdbb..390ac2bb5a9 100644 --- a/arch/arm/dts/rk3399-gru-u-boot.dtsi +++ b/arch/arm/dts/rk3399-gru-u-boot.dtsi @@ -4,3 +4,7 @@ */ #include "rk3399-u-boot.dtsi" + +&spi_flash { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/rk3399-gru.dtsi b/arch/arm/dts/rk3399-gru.dtsi index 7ac88392f2c..f9c5bb607ba 100644 --- a/arch/arm/dts/rk3399-gru.dtsi +++ b/arch/arm/dts/rk3399-gru.dtsi @@ -537,7 +537,7 @@ ap_i2c_audio: &i2c8 { pinctrl-names = "default", "sleep"; pinctrl-1 = <&spi1_sleep>; - spiflash@0 { + spi_flash: spiflash@0 { compatible = "jedec,spi-nor"; reg = <0>; diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi index 82377824085..ecd230c7202 100644 --- a/arch/arm/dts/rk3399-u-boot.dtsi +++ b/arch/arm/dts/rk3399-u-boot.dtsi @@ -4,11 +4,14 @@ */ #define USB_CLASS_HUB 9 +#include "rockchip-u-boot.dtsi" + / { aliases { mmc0 = &sdhci; mmc1 = &sdmmc; pci0 = &pcie0; + spi1 = &spi1; }; cic: syscon@ff620000 { @@ -57,6 +60,30 @@ }; +#ifdef CONFIG_ROCKCHIP_SPI_IMAGE +&binman { + rom { + filename = "u-boot.rom"; + size = <0x400000>; + pad-byte = <0xff>; + + mkimage { + args = "-n rk3399 -T rkspi"; + u-boot-spl { + }; + }; + u-boot-img { + offset = <0x40000>; + }; + u-boot { + offset = <0x300000>; + }; + fdtmap { + }; + }; +}; +#endif + &cru { u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/rockchip-optee.dtsi b/arch/arm/dts/rockchip-optee.dtsi new file mode 100644 index 00000000000..cde9b81b26b --- /dev/null +++ b/arch/arm/dts/rockchip-optee.dtsi @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2020 Google LLC + */ + +#include <config.h> + +#if defined(CONFIG_HAS_ROM) && defined(CONFIG_FIT) +&binman { + itb { + filename = "u-boot.itb"; + fit { + fit,external-offset = <CONFIG_FIT_EXTERNAL_OFFSET>; + description = "FIT image with OP-TEE support"; + #address-cells = <1>; + + images { + uboot { + description = "U-Boot"; + type = "standalone"; + os = "U-Boot"; + arch = "arm"; + compression = "none"; + load = <CONFIG_SYS_TEXT_BASE>; + + u-boot-nodtb { + }; + }; + optee { + description = "OP-TEE"; + type = "firmware"; + arch = "arm"; + os = "tee"; + compression = "none"; + load = <(CONFIG_SYS_SDRAM_BASE + 0x8400000)>; + entry = <(CONFIG_SYS_SDRAM_BASE + 0x8400000)>; + + blob-ext { + filename = "tee.bin"; + }; + }; + fdt { + description = CONFIG_SYS_BOARD; + type = "flat_dt"; + compression = "none"; + + u-boot-dtb { + }; + }; + }; + + configurations { + default = "conf"; + conf { + description = CONFIG_SYS_BOARD; + firmware = "optee"; + loadables = "uboot"; + fdt = "fdt"; + }; + }; + }; + }; +}; +#endif diff --git a/arch/arm/dts/rockchip-u-boot.dtsi b/arch/arm/dts/rockchip-u-boot.dtsi index a2559e2db08..eae3ee715da 100644 --- a/arch/arm/dts/rockchip-u-boot.dtsi +++ b/arch/arm/dts/rockchip-u-boot.dtsi @@ -6,7 +6,14 @@ #include <config.h> / { - binman { + binman: binman { + multiple-images; + }; +}; + +#ifdef CONFIG_SPL +&binman { + simple-bin { filename = "u-boot-rockchip.bin"; pad-byte = <0xff>; @@ -19,3 +26,4 @@ }; }; }; +#endif diff --git a/arch/arm/mach-at91/config.mk b/arch/arm/mach-at91/config.mk index 9a023efb193..5426394651e 100644 --- a/arch/arm/mach-at91/config.mk +++ b/arch/arm/mach-at91/config.mk @@ -4,6 +4,6 @@ endif ifeq ($(CONFIG_CPU_V7A),y) ifndef CONFIG_SPL_BUILD -ALL-y += u-boot.img +INPUTS-y += u-boot.img endif endif diff --git a/arch/arm/mach-davinci/config.mk b/arch/arm/mach-davinci/config.mk index 5a33982e2d3..4674cae43b1 100644 --- a/arch/arm/mach-davinci/config.mk +++ b/arch/arm/mach-davinci/config.mk @@ -2,5 +2,5 @@ # # Copyright (C) 2012, Texas Instruments, Incorporated - http://www.ti.com/ ifndef CONFIG_SPL_BUILD -ALL-$(CONFIG_SPL_FRAMEWORK) += u-boot.ais +INPUTS-$(CONFIG_SPL_FRAMEWORK) += u-boot.ais endif diff --git a/arch/arm/mach-k3/config.mk b/arch/arm/mach-k3/config.mk index f7afef610c4..c9538718e7a 100644 --- a/arch/arm/mach-k3/config.mk +++ b/arch/arm/mach-k3/config.mk @@ -44,7 +44,7 @@ tiboot3.bin: image_check FORCE $(srctree)/tools/k3_gen_x509_cert.sh -c 16 -b $(obj)/u-boot-spl.bin \ -o $@ -l $(CONFIG_SPL_TEXT_BASE) -k $(KEY) -ALL-y += tiboot3.bin +INPUTS-y += tiboot3.bin endif ifdef CONFIG_ARM64 @@ -52,10 +52,10 @@ ifdef CONFIG_ARM64 ifeq ($(CONFIG_TI_SECURE_DEVICE),y) SPL_ITS := u-boot-spl-k3_HS.its $(SPL_ITS): export IS_HS=1 -ALL-y += tispl.bin_HS +INPUTS-y += tispl.bin_HS else SPL_ITS := u-boot-spl-k3.its -ALL-y += tispl.bin +INPUTS-y += tispl.bin endif quiet_cmd_k3_mkits = MKITS $@ @@ -70,9 +70,9 @@ endif else ifeq ($(CONFIG_TI_SECURE_DEVICE),y) -ALL-y += u-boot.img_HS +INPUTS-y += u-boot.img_HS else -ALL-y += u-boot.img +INPUTS-y += u-boot.img endif endif diff --git a/arch/arm/mach-keystone/config.mk b/arch/arm/mach-keystone/config.mk index 5806f8f5d1a..5a16891f234 100644 --- a/arch/arm/mach-keystone/config.mk +++ b/arch/arm/mach-keystone/config.mk @@ -9,9 +9,9 @@ include $(srctree)/arch/arm/mach-omap2/config_secure.mk ifndef CONFIG_SPL_BUILD ifeq ($(CONFIG_TI_SECURE_DEVICE),y) -ALL-y += u-boot_HS_MLO +INPUTS-y += u-boot_HS_MLO else -ALL-y += MLO +INPUTS-y += MLO endif endif diff --git a/arch/arm/mach-omap2/config.mk b/arch/arm/mach-omap2/config.mk index af455366ed9..4f0d2598fa8 100644 --- a/arch/arm/mach-omap2/config.mk +++ b/arch/arm/mach-omap2/config.mk @@ -18,9 +18,9 @@ ifeq ($(CONFIG_TI_SECURE_DEVICE),y) # Refer to README.ti-secure for more info # For booting spl from QSPI or NOR use # u-boot-spl_HS_X-LOADER ifeq ($(CONFIG_OMAP54XX),y) -ALL-y += u-boot-spl_HS_MLO -ALL-y += u-boot-spl_HS_ULO -ALL-y += u-boot-spl_HS_X-LOADER +INPUTS-y += u-boot-spl_HS_MLO +INPUTS-y += u-boot-spl_HS_ULO +INPUTS-y += u-boot-spl_HS_X-LOADER endif # On AM43XX: # @@ -30,8 +30,8 @@ endif # For booting spl from all other media use # u-boot-spl_HS_ISSW ifeq ($(CONFIG_AM43XX),y) -ALL-y += u-boot-spl_HS_SPI_X-LOADER -ALL-y += u-boot-spl_HS_ISSW +INPUTS-y += u-boot-spl_HS_SPI_X-LOADER +INPUTS-y += u-boot-spl_HS_ISSW endif # On AM33XX: # @@ -47,21 +47,21 @@ endif # For booting spl over UART, USB, or Ethernet use # u-boot-spl_HS_2ND ifeq ($(CONFIG_AM33XX),y) -ALL-y += u-boot-spl_HS_SPI_X-LOADER -ALL-y += u-boot-spl_HS_X-LOADER -ALL-y += u-boot-spl_HS_MLO -ALL-y += u-boot-spl_HS_2ND +INPUTS-y += u-boot-spl_HS_SPI_X-LOADER +INPUTS-y += u-boot-spl_HS_X-LOADER +INPUTS-y += u-boot-spl_HS_MLO +INPUTS-y += u-boot-spl_HS_2ND endif else -ALL-y += MLO +INPUTS-y += MLO ifeq ($(CONFIG_AM33XX),y) -ALL-y += MLO.byteswap +INPUTS-y += MLO.byteswap endif endif else ifeq ($(CONFIG_TI_SECURE_DEVICE),y) -ALL-$(CONFIG_QSPI_BOOT) += u-boot_HS_XIP_X-LOADER -ALL-$(CONFIG_SPL_LOAD_FIT) += u-boot_HS.img +INPUTS-$(CONFIG_QSPI_BOOT) += u-boot_HS_XIP_X-LOADER +INPUTS-$(CONFIG_SPL_LOAD_FIT) += u-boot_HS.img endif -ALL-y += u-boot.img +INPUTS-y += u-boot.img endif diff --git a/arch/arm/mach-rmobile/Makefile b/arch/arm/mach-rmobile/Makefile index a3fdcc3bc0e..3206bce7220 100644 --- a/arch/arm/mach-rmobile/Makefile +++ b/arch/arm/mach-rmobile/Makefile @@ -84,5 +84,5 @@ spl/u-boot-spl.scif: spl/u-boot-spl.srec spl/u-boot-spl.bin # if srec_cat is present build u-boot-spl.scif by default has_srec_cat = $(call try-run,srec_cat -VERSion,y,n) -ALL-$(has_srec_cat) += u-boot-spl.scif +INPUTS-$(has_srec_cat) += u-boot-spl.scif CLEAN_FILES += u-boot-spl.scif diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index fcab1d5cee9..407bf3fbeae 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -367,6 +367,15 @@ config TPL_ROCKCHIP_EARLYRETURN_TO_BROM config SPL_MMC_SUPPORT default y if !SPL_ROCKCHIP_BACK_TO_BROM +config ROCKCHIP_SPI_IMAGE + bool "Build a SPI image for rockchip" + depends on HAS_ROM + help + Some Rockchip SoCs support booting from SPI flash. Enable this + option to produce a 4MB SPI-flash image (called u-boot.rom) + containing U-Boot. The image is built by binman. U-Boot sits near + the start of the image. + source "arch/arm/mach-rockchip/px30/Kconfig" source "arch/arm/mach-rockchip/rk3036/Kconfig" source "arch/arm/mach-rockchip/rk3128/Kconfig" diff --git a/arch/arm/mach-rockchip/fit_spl_optee.sh b/arch/arm/mach-rockchip/fit_spl_optee.sh deleted file mode 100755 index 4118472d9f2..00000000000 --- a/arch/arm/mach-rockchip/fit_spl_optee.sh +++ /dev/null @@ -1,84 +0,0 @@ -#!/bin/sh -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2019 Rockchip Electronic Co.,Ltd -# -# Script to generate FIT image source for 32-bit Rockchip SoCs with -# U-Boot proper, OPTEE, and devicetree. -# -# usage: $0 <dt_name> - -[ -z "$TEE" ] && TEE="tee.bin" - -if [ ! -f $TEE ]; then - echo "WARNING: TEE file $TEE NOT found, U-Boot.itb is non-functional" >&2 - echo "Please export path for TEE or copy tee.bin to U-Boot folder" >&2 - TEE=/dev/null -fi - -dtname=$1 -text_base=`sed -n "/SYS_TEXT_BASE=/s/CONFIG_SYS_TEXT_BASE=//p" .config \ - |tr -d '\r'` -dram_base=`sed -n "/SYS_SDRAM_BASE=/s/CONFIG_SYS_SDRAM_BASE=//p" \ - include/autoconf.mk|tr -d '\r'` -tee_base=`echo "obase=16;$(($dram_base+0x8400000))"|bc` -tee_base='0x'$tee_base - -cat << __HEADER_EOF -/* - * Copyright (C) 2017-2019 Rockchip Electronic Co.,Ltd - * - * Simple U-boot FIT source file containing U-Boot, dtb and optee - */ - -/dts-v1/; - -/ { - description = "FIT image with OP-TEE support"; - #address-cells = <1>; - - images { - uboot { - description = "U-Boot"; - data = /incbin/("u-boot-nodtb.bin"); - type = "standalone"; - os = "U-Boot"; - arch = "arm"; - compression = "none"; - load = <$text_base>; - }; - optee { - description = "OP-TEE"; - data = /incbin/("$TEE"); - type = "firmware"; - arch = "arm"; - os = "tee"; - compression = "none"; - load = <$tee_base>; - entry = <$tee_base>; - }; - fdt { - description = "$(basename $dtname .dtb)"; - data = /incbin/("$dtname"); - type = "flat_dt"; - compression = "none"; - }; -__HEADER_EOF - -cat << __CONF_HEADER_EOF - }; - - configurations { - default = "conf"; - conf { - description = "$(basename $dtname .dtb)"; - firmware = "optee"; - loadables = "uboot"; - fdt = "fdt"; - }; -__CONF_HEADER_EOF - -cat << __ITS_EOF - }; -}; -__ITS_EOF diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig index afb62fca78e..20a00c5be78 100644 --- a/arch/arm/mach-rockchip/rk3288/Kconfig +++ b/arch/arm/mach-rockchip/rk3288/Kconfig @@ -5,7 +5,9 @@ choice config TARGET_CHROMEBOOK_JERRY bool "Google/Rockchip Veyron-Jerry Chromebook" + select HAS_ROM select BOARD_LATE_INIT + select ROCKCHIP_SPI_IMAGE help Jerry is a RK3288-based clamshell device with 2 USB 3.0 ports, HDMI, an 11.9 inch EDP display, micro-SD card, touchpad and @@ -46,6 +48,7 @@ config TARGET_CHROMEBOOK_SPEEDY config TARGET_EVB_RK3288 bool "Evb-RK3288" + select HAS_ROM select BOARD_LATE_INIT select TPL help diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig index 254b9c5b4d7..17628f91712 100644 --- a/arch/arm/mach-rockchip/rk3399/Kconfig +++ b/arch/arm/mach-rockchip/rk3399/Kconfig @@ -5,6 +5,8 @@ choice config TARGET_CHROMEBOOK_BOB bool "Asus Flip C101PA Chromebook (RK3399)" + select HAS_ROM + select ROCKCHIP_SPI_IMAGE help Bob is a small RK3299-based device similar in apperance to Minnie. It has two USB 3.0 type-C ports, 4GB of SDRAM, WiFi and a 10.1", diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c index cddf4fd3d57..f148d48b6a3 100644 --- a/arch/arm/mach-rockchip/spl.c +++ b/arch/arm/mach-rockchip/spl.c @@ -54,7 +54,8 @@ u32 spl_boot_device(void) #if defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \ defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \ defined(CONFIG_TARGET_CHROMEBOOK_MINNIE) || \ - defined(CONFIG_TARGET_CHROMEBOOK_SPEEDY) + defined(CONFIG_TARGET_CHROMEBOOK_SPEEDY) || \ + defined(CONFIG_TARGET_CHROMEBOOK_BOB) return BOOT_DEVICE_SPI; #endif if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)) diff --git a/arch/arm/mach-stm32mp/config.mk b/arch/arm/mach-stm32mp/config.mk index 403af2a225e..c30bf482f72 100644 --- a/arch/arm/mach-stm32mp/config.mk +++ b/arch/arm/mach-stm32mp/config.mk @@ -4,10 +4,10 @@ # ifndef CONFIG_SPL -ALL-y += u-boot.stm32 +INPUTS-y += u-boot.stm32 else ifdef CONFIG_SPL_BUILD -ALL-y += u-boot-spl.stm32 +INPUTS-y += u-boot-spl.stm32 endif endif diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 15e76840281..a397748b72b 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -41,7 +41,6 @@ config TEGRA_PMC_SECURE config TEGRA_COMMON bool "Tegra common options" - select BINMAN select BOARD_EARLY_INIT_F select CLK select DM @@ -69,6 +68,7 @@ config TEGRA_NO_BPMP config TEGRA_ARMV7_COMMON bool "Tegra 32-bit common options" + select BINMAN select CPU_V7A select SPL select SPL_BOARD_INIT if SPL diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index c2c577f60c1..6a2e88fed25 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -20,7 +20,7 @@ config MPC85xx select CREATE_ARCH_SYMLINK select SYS_FSL_DDR select SYS_FSL_DDR_BE - select BINMAN + select BINMAN if OF_SEPARATE imply CMD_HASH imply CMD_IRQ imply USB_EHCI_HCD if USB diff --git a/arch/sandbox/dts/sandbox.dtsi b/arch/sandbox/dts/sandbox.dtsi index e1f68cd552a..c76ecc013c9 100644 --- a/arch/sandbox/dts/sandbox.dtsi +++ b/arch/sandbox/dts/sandbox.dtsi @@ -15,6 +15,20 @@ #sound-dai-cells = <1>; }; + buttons { + compatible = "gpio-keys"; + + summer { + gpios = <&gpio_a 3 0>; + label = "summer"; + }; + + christmas { + gpios = <&gpio_a 4 0>; + label = "christmas"; + }; + }; + gpio_a: gpios@0 { u-boot,dm-pre-reloc; gpio-controller; diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 2ae42397216..491893a17dc 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -51,6 +51,20 @@ #sound-dai-cells = <1>; }; + buttons { + compatible = "gpio-keys"; + + summer { + gpios = <&gpio_a 3 0>; + label = "summer"; + }; + + christmas { + gpios = <&gpio_a 4 0>; + label = "christmas"; + }; + }; + cros_ec: cros-ec { reg = <0 0>; compatible = "google,cros-ec-sandbox"; @@ -355,22 +369,22 @@ hog_input_active_low { gpio-hog; input; - gpios = <0 GPIO_ACTIVE_LOW>; + gpios = <10 GPIO_ACTIVE_LOW>; }; hog_input_active_high { gpio-hog; input; - gpios = <1 GPIO_ACTIVE_HIGH>; + gpios = <11 GPIO_ACTIVE_HIGH>; }; hog_output_low { gpio-hog; output-low; - gpios = <2 GPIO_ACTIVE_HIGH>; + gpios = <12 GPIO_ACTIVE_HIGH>; }; hog_output_high { gpio-hog; output-high; - gpios = <3 GPIO_ACTIVE_HIGH>; + gpios = <13 GPIO_ACTIVE_HIGH>; }; }; diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index ff4f06ed79c..cbca69ef6b3 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -360,6 +360,8 @@ config HAVE_FSP bool "Add an Firmware Support Package binary" depends on !EFI select USE_HOB + select HAS_ROM + select ROM_NEEDS_BLOBS help Select this option to add an Firmware Support Package binary to the resulting U-Boot image. It is a binary blob which U-Boot uses @@ -519,6 +521,8 @@ config ENABLE_MRC_CACHE config HAVE_MRC bool "Add a System Agent binary" + select HAS_ROM + select ROM_NEEDS_BLOBS depends on !HAVE_FSP help Select this option to add a System Agent binary to @@ -590,8 +594,13 @@ config HAVE_REFCODE Various peripherals may fail to work. config HAVE_MICROCODE - bool + bool "Board requires a microcode binary" default y if !FSP_VERSION2 + help + Enable this if the board requires microcode to be loaded on boot. + Typically this is handed by the FSP for modern boards, but for + some older boards, it must be programmed by U-Boot, and that form + part of the image. config SMP bool "Enable Symmetric Multiprocessing" diff --git a/arch/x86/cpu/quark/Kconfig b/arch/x86/cpu/quark/Kconfig index 430cce184d4..2fee38aed79 100644 --- a/arch/x86/cpu/quark/Kconfig +++ b/arch/x86/cpu/quark/Kconfig @@ -24,6 +24,7 @@ if INTEL_QUARK config HAVE_RMU bool "Add a Remote Management Unit (RMU) binary" + select ROM_NEEDS_BLOBS help Select this option to add a Remote Management Unit (RMU) binary to the resulting U-Boot image. It is a data block (up to 64K) of diff --git a/arch/x86/dts/u-boot.dtsi b/arch/x86/dts/u-boot.dtsi index f0f8c71761a..fa8106c8b8c 100644 --- a/arch/x86/dts/u-boot.dtsi +++ b/arch/x86/dts/u-boot.dtsi @@ -75,11 +75,15 @@ u-boot { offset = <CONFIG_SYS_TEXT_BASE>; }; -# else +# elif defined(CONFIG_HAVE_MICROCODE) /* If there is no SPL then we need to put microcode in U-Boot */ u-boot-with-ucode-ptr { offset = <CONFIG_X86_OFFSET_U_BOOT>; }; +# else + u-boot-nodtb { + offset = <CONFIG_X86_OFFSET_U_BOOT>; + }; # endif #endif #ifdef CONFIG_HAVE_MICROCODE @@ -92,6 +96,8 @@ u-boot-dtb { }; #endif + fdtmap { + }; #ifdef CONFIG_HAVE_X86_FIT intel-fit { }; @@ -139,8 +145,6 @@ filename = CONFIG_FSP_FILE_S; }; #endif - fdtmap { - }; #ifdef CONFIG_HAVE_CMC intel-cmc { filename = CONFIG_CMC_FILE; |