diff options
| author | Jun Nie | 2019-05-08 14:38:31 +0800 |
|---|---|---|
| committer | Stefano Babic | 2019-06-11 10:42:48 +0200 |
| commit | 79fcbde8eb57a0dfc9761c4ba167186843d7a707 (patch) | |
| tree | a10e0f01ee43d5c15d793023a4686beac5fe5b45 /arch | |
| parent | bc7c9ed33c685a8285e4fcf2a9f24499f14026a9 (diff) | |
pico-imx7d: Correct uart clock root
Correct uart clock root ID. Incorrect ID may result the
clock is gated because rate value 0 is returned in
imx_get_uartclk()
The ID can be ignored if CONFIG_SKIP_LOWLEVEL_INIT is not enabled
because init_clk_uart() will enable all uart clocks in that case.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/include/asm/arch-mx7/clock.h | 18 | ||||
| -rw-r--r-- | arch/arm/mach-imx/mx7/clock.c | 2 |
2 files changed, 19 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-mx7/clock.h b/arch/arm/include/asm/arch-mx7/clock.h index f56564ea6fc..1d07fde5432 100644 --- a/arch/arm/include/asm/arch-mx7/clock.h +++ b/arch/arm/include/asm/arch-mx7/clock.h @@ -175,6 +175,24 @@ enum clk_root_index { CLK_ROOT_MAX, }; +#if (CONFIG_CONS_INDEX == 0) +#define UART_CLK_ROOT UART1_CLK_ROOT +#elif (CONFIG_CONS_INDEX == 1) +#define UART_CLK_ROOT UART2_CLK_ROOT +#elif (CONFIG_CONS_INDEX == 2) +#define UART_CLK_ROOT UART3_CLK_ROOT +#elif (CONFIG_CONS_INDEX == 3) +#define UART_CLK_ROOT UART4_CLK_ROOT +#elif (CONFIG_CONS_INDEX == 4) +#define UART_CLK_ROOT UART5_CLK_ROOT +#elif (CONFIG_CONS_INDEX == 5) +#define UART_CLK_ROOT UART6_CLK_ROOT +#elif (CONFIG_CONS_INDEX == 6) +#define UART_CLK_ROOT UART7_CLK_ROOT +#else +#error "Invalid IMX UART ID for serial console is defined" +#endif + struct clk_root_setting { enum clk_root_index root; u32 setting; diff --git a/arch/arm/mach-imx/mx7/clock.c b/arch/arm/mach-imx/mx7/clock.c index 8cda71cf55b..e364b162d92 100644 --- a/arch/arm/mach-imx/mx7/clock.c +++ b/arch/arm/mach-imx/mx7/clock.c @@ -53,7 +53,7 @@ static u32 get_ipg_clk(void) u32 imx_get_uartclk(void) { - return get_root_clk(UART1_CLK_ROOT); + return get_root_clk(UART_CLK_ROOT); } u32 imx_get_fecclk(void) |