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authorMugunthan V N2016-07-18 15:10:57 +0530
committerHeiko Schocher2016-07-26 08:39:23 +0200
commit7fb825f5b112713f572917fa7e89aac2b5b9c7b4 (patch)
treec5f7b67227ac5d60d15e31ae42469ee93c093f5c /arch
parent3465f807d4b90378d86b3904ce2db196462ddd4e (diff)
omap5/dra7: i2c: correct register offset for sync register
The register offset of i2c_sysc offset is not correct as per omap5[1]/dra7[2] TRM, correct the offsets as per the documentation. [1] - http://www.ti.com/lit/pdf/swpu249 [2] - http://www.ti.com/lit/pdf/spruhz6 Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/include/asm/arch-omap5/i2c.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/include/asm/arch-omap5/i2c.h b/arch/arm/include/asm/arch-omap5/i2c.h
index d875cfe0b4f..2b55edf7f0c 100644
--- a/arch/arm/include/asm/arch-omap5/i2c.h
+++ b/arch/arm/include/asm/arch-omap5/i2c.h
@@ -14,9 +14,9 @@ struct i2c {
unsigned short revnb_lo; /* 0x00 */
unsigned short res1;
unsigned short revnb_hi; /* 0x04 */
- unsigned short res2[13];
- unsigned short sysc; /* 0x20 */
- unsigned short res3;
+ unsigned short res2[5];
+ unsigned short sysc; /* 0x10 */
+ unsigned short res3[9];
unsigned short irqstatus_raw; /* 0x24 */
unsigned short res4;
unsigned short stat; /* 0x28 */