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authorKever Yang2019-03-29 09:09:01 +0800
committerPhilipp Tomsich2019-05-01 09:40:58 +0200
commit86d0eca451229808ccb9e028558152476f73b24b (patch)
treeb1c9e684c2cebdb14a98a6b422fd4d9ee72a1e3d /arch
parent7f3eec03d59a0532579ba364e0ba1381feafb814 (diff)
rockchip: rk3188: add board_debug_uart_init()
Use board_debug_uart_init() for UART iomux init instead of do it in board_init_f, and move the function to soc file so that we can find all the soc/board setting in soc file and use a common board file. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-rockchip/rk3188-board-spl.c28
-rw-r--r--arch/arm/mach-rockchip/rk3188/Makefile1
-rw-r--r--arch/arm/mach-rockchip/rk3188/rk3188.c36
3 files changed, 38 insertions, 27 deletions
diff --git a/arch/arm/mach-rockchip/rk3188-board-spl.c b/arch/arm/mach-rockchip/rk3188-board-spl.c
index 230d69c4c1c..77b9b36d357 100644
--- a/arch/arm/mach-rockchip/rk3188-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3188-board-spl.c
@@ -93,38 +93,12 @@ static int setup_arm_clock(void)
return ret;
}
-void board_debug_uart_init(void)
-{
- /* Enable early UART on the RK3188 */
-#define GRF_BASE 0x20008000
- struct rk3188_grf * const grf = (void *)GRF_BASE;
- enum {
- GPIO1B1_SHIFT = 2,
- GPIO1B1_MASK = 3,
- GPIO1B1_GPIO = 0,
- GPIO1B1_UART2_SOUT,
-
- GPIO1B0_SHIFT = 0,
- GPIO1B0_MASK = 3,
- GPIO1B0_GPIO = 0,
- GPIO1B0_UART2_SIN,
- };
-
- /* Enable early UART on the RK3188 */
- rk_clrsetreg(&grf->gpio1b_iomux,
- GPIO1B1_MASK << GPIO1B1_SHIFT |
- GPIO1B0_MASK << GPIO1B0_SHIFT,
- GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT |
- GPIO1B0_UART2_SIN << GPIO1B0_SHIFT);
-}
-
void board_init_f(ulong dummy)
{
struct udevice *dev;
int ret;
-#define EARLY_UART
-#ifdef EARLY_UART
+#ifdef CONFIG_DEBUG_UART
/*
* Debug UART can be used from here if required:
*
diff --git a/arch/arm/mach-rockchip/rk3188/Makefile b/arch/arm/mach-rockchip/rk3188/Makefile
index 7fa010405b1..7dc123a3d23 100644
--- a/arch/arm/mach-rockchip/rk3188/Makefile
+++ b/arch/arm/mach-rockchip/rk3188/Makefile
@@ -6,5 +6,6 @@
ifndef CONFIG_TPL_BUILD
obj-y += clk_rk3188.o
+obj-y += rk3188.o
obj-y += syscon_rk3188.o
endif
diff --git a/arch/arm/mach-rockchip/rk3188/rk3188.c b/arch/arm/mach-rockchip/rk3188/rk3188.c
new file mode 100644
index 00000000000..933484e0df9
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3188/rk3188.c
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch-rockchip/grf_rk3188.h>
+#include <asm/arch-rockchip/hardware.h>
+
+#ifdef CONFIG_DEBUG_UART_BOARD_INIT
+void board_debug_uart_init(void)
+{
+ /* Enable early UART on the RK3188 */
+#define GRF_BASE 0x20008000
+ struct rk3188_grf * const grf = (void *)GRF_BASE;
+ enum {
+ GPIO1B1_SHIFT = 2,
+ GPIO1B1_MASK = 3,
+ GPIO1B1_GPIO = 0,
+ GPIO1B1_UART2_SOUT,
+ GPIO1B1_JTAG_TDO,
+
+ GPIO1B0_SHIFT = 0,
+ GPIO1B0_MASK = 3,
+ GPIO1B0_GPIO = 0,
+ GPIO1B0_UART2_SIN,
+ GPIO1B0_JTAG_TDI,
+ };
+
+ rk_clrsetreg(&grf->gpio1b_iomux,
+ GPIO1B1_MASK << GPIO1B1_SHIFT |
+ GPIO1B0_MASK << GPIO1B0_SHIFT,
+ GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT |
+ GPIO1B0_UART2_SIN << GPIO1B0_SHIFT);
+}
+#endif