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authorThomas Chou2015-11-03 13:52:15 +0800
committerThomas Chou2015-11-06 09:14:12 +0800
commit9208d7eba1c2f027cdd06e6ce6ec90d3889764bf (patch)
tree1fe12b3fb1a57a83965785af86de3dfe384f217e /arch
parent65af9f69716ca0a765eebb8c14d851f89e2196d3 (diff)
nios2: fix cached mode in clearing the BSS
As the generic board runs in cached mode, it should not use "stwio" which bypass the cache. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Chin Liang See <clsee@altera.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/nios2/cpu/start.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/nios2/cpu/start.S b/arch/nios2/cpu/start.S
index bb86bbf40c4..54787c53ca7 100644
--- a/arch/nios2/cpu/start.S
+++ b/arch/nios2/cpu/start.S
@@ -158,7 +158,7 @@ relocate_code:
ori r6, r6, %lo(__bss_end)
beq r5, r6, 5f
-4: stwio r0, 0(r5)
+4: stw r0, 0(r5)
addi r5, r5, 4
bne r5, r6, 4b
5: