diff options
| author | Jagan Teki | 2023-01-30 20:27:47 +0530 |
|---|---|---|
| committer | Kever Yang | 2023-02-28 18:07:28 +0800 |
| commit | 95c8656b72dc86b33f9bfb4ffc8aea1255a448be (patch) | |
| tree | 411496edec0cd6780c3a7dbef17883051ff657be /arch | |
| parent | 2a8481ec16783625f517a12dfb129675d6530d4f (diff) | |
ARM: dts: rockchip: rk3588s-u-boot: Add sdmmc node
Booting from SDMMC is one of the fast and easy booting methods
for initial support of any SoC to upstream more features.
This patch is trying to add the sdmmc node for rk3588 and added
as u-boot specific node in -u-boot.dtsi as upstream Linux is not
supporting yet.
As soon as Linux supports it, a sync of the Linux device tree
would eventually drop this node.
Clock properties as added according to the rockchip mmc driver
but the actual definition might add scmi clocks into 0 and 1
indexes. This is due to scmi clock are not supporting in upstream
U-Boot. Properly addition of scmi clock would eventually follow
sdmmc clock definition of Linux once they upstreamed.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/rk3588s-u-boot.dtsi | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi b/arch/arm/dts/rk3588s-u-boot.dtsi index 326508d224c..b58aef4c4d3 100644 --- a/arch/arm/dts/rk3588s-u-boot.dtsi +++ b/arch/arm/dts/rk3588s-u-boot.dtsi @@ -17,6 +17,20 @@ compatible = "rockchip,rk3588-pmu1-grf", "syscon"; reg = <0x0 0xfd58a000 0x0 0x2000>; }; + + sdmmc: mmc@fe2c0000 { + compatible = "rockchip,rk3588-dw-mshc", "rockchip,rk3288-dw-mshc"; + reg = <0x0 0xfe2c0000 0x0 0x4000>; + interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>, + <&scmi_clk SCMI_HCLK_SD>, <&scmi_clk SCMI_CCLK_SD>; + clock-names = "ciu-drive", "ciu-sample", "biu", "ciu"; + fifo-depth = <0x100>; + max-frequency = <200000000>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_det &sdmmc_bus4>; + status = "disabled"; + }; }; &xin24m { |