diff options
| author | Tom Rini | 2020-04-20 17:22:47 -0400 |
|---|---|---|
| committer | Tom Rini | 2020-04-20 17:22:47 -0400 |
| commit | a06375805917a5b48c46724ceef4a1cd04935992 (patch) | |
| tree | 45bba4e4fb8332c55324efaf96e46e6cbd8f4d93 /arch | |
| parent | e4837da7828293ea49abc579f939c0f5c4b127c3 (diff) | |
| parent | 48180e15d3eaff51b1da30a90bc64b7acba8fb51 (diff) | |
Merge branch '2020-04-17-master-imports'
- Further cleanups for 'make refcheckdocs'
- Another BTRFS fix.
- Support for automatic decompression of images with booti as well as
unlz4 command for manual decompression.
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/mt7622.dtsi | 19 | ||||
| -rw-r--r-- | arch/arm/dts/mt7623.dtsi | 17 | ||||
| -rw-r--r-- | arch/arm/dts/mt7629.dtsi | 16 | ||||
| -rw-r--r-- | arch/arm/lib/bootm.c | 3 |
4 files changed, 55 insertions, 0 deletions
diff --git a/arch/arm/dts/mt7622.dtsi b/arch/arm/dts/mt7622.dtsi index 1e8ec9b48be..f9ce0c6c3ec 100644 --- a/arch/arm/dts/mt7622.dtsi +++ b/arch/arm/dts/mt7622.dtsi @@ -227,4 +227,23 @@ #clock-cells = <1>; }; + pwm: pwm@11006000 { + compatible = "mediatek,mt7622-pwm"; + reg = <0x11006000 0x1000>; + #clock-cells = <1>; + #pwm-cells = <2>; + interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_LOW>; + clocks = <&topckgen CLK_TOP_PWM_SEL>, + <&pericfg CLK_PERI_PWM_PD>, + <&pericfg CLK_PERI_PWM1_PD>, + <&pericfg CLK_PERI_PWM2_PD>, + <&pericfg CLK_PERI_PWM3_PD>, + <&pericfg CLK_PERI_PWM4_PD>, + <&pericfg CLK_PERI_PWM5_PD>, + <&pericfg CLK_PERI_PWM6_PD>; + clock-names = "top", "main", "pwm1", "pwm2", "pwm3", "pwm4", + "pwm5", "pwm6"; + status = "disabled"; + }; + }; diff --git a/arch/arm/dts/mt7623.dtsi b/arch/arm/dts/mt7623.dtsi index 1f45dea575b..0452889ef80 100644 --- a/arch/arm/dts/mt7623.dtsi +++ b/arch/arm/dts/mt7623.dtsi @@ -400,4 +400,21 @@ mediatek,ethsys = <ðsys>; status = "disabled"; }; + + pwm: pwm@11006000 { + compatible = "mediatek,mt7623-pwm"; + reg = <0x11006000 0x1000>; + #clock-cells = <1>; + #pwm-cells = <2>; + clocks = <&topckgen CLK_TOP_PWM_SEL>, + <&pericfg CLK_PERI_PWM>, + <&pericfg CLK_PERI_PWM1>, + <&pericfg CLK_PERI_PWM2>, + <&pericfg CLK_PERI_PWM3>, + <&pericfg CLK_PERI_PWM4>, + <&pericfg CLK_PERI_PWM5>; + clock-names = "top", "main", "pwm1", "pwm2", "pwm3", "pwm4", + "pwm5"; + status = "disabled"; + }; }; diff --git a/arch/arm/dts/mt7629.dtsi b/arch/arm/dts/mt7629.dtsi index a33a74a5568..644d2da4a88 100644 --- a/arch/arm/dts/mt7629.dtsi +++ b/arch/arm/dts/mt7629.dtsi @@ -281,4 +281,20 @@ reg = <0x1b130000 0x1000>; #clock-cells = <1>; }; + + pwm: pwm@11006000 { + compatible = "mediatek,mt7629-pwm"; + reg = <0x11006000 0x1000>; + #clock-cells = <1>; + #pwm-cells = <2>; + interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_LOW>; + clocks = <&topckgen CLK_TOP_PWM_SEL>, + <&pericfg CLK_PERI_PWM_PD>, + <&pericfg CLK_PERI_PWM1_PD>; + clock-names = "top", "main", "pwm1"; + assigned-clocks = <&topckgen CLK_TOP_PWM_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL2_D4>; + status = "disabled"; + }; + }; diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c index a135bcfc7b5..f4b5ca6de00 100644 --- a/arch/arm/lib/bootm.c +++ b/arch/arm/lib/bootm.c @@ -75,6 +75,9 @@ void arch_lmb_reserve(struct lmb *lmb) gd->bd->bi_dram[bank].size - 1; if (sp > bank_end) continue; + if (bank_end > gd->ram_top) + bank_end = gd->ram_top - 1; + lmb_reserve(lmb, sp, bank_end - sp + 1); break; } |