global: Move remaining CONFIG_SYS_NUM_* to CFG_SYS_NUM_*

The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NUM
namespace do not easily transition to Kconfig. In many cases they likely
should come from the device tree instead. Move these out of CONFIG
namespace and in to CFG namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

14 files changed, 68 insertions, 68 deletions

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index ff752c21b14..0669222fed7 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -209,9 +209,9 @@
 
 /* SoC related */
 #ifdef CONFIG_ARCH_LS1043A
-#define CONFIG_SYS_NUM_FMAN			1
-#define CONFIG_SYS_NUM_FM1_DTSEC		7
-#define CONFIG_SYS_NUM_FM1_10GEC		1
+#define CFG_SYS_NUM_FMAN			1
+#define CFG_SYS_NUM_FM1_DTSEC		7
+#define CFG_SYS_NUM_FM1_10GEC		1
 #define CONFIG_SYS_DDR_BLOCK1_SIZE		((phys_size_t)2 << 30)
 #define CONFIG_MAX_MEM_MAPPED			CONFIG_SYS_DDR_BLOCK1_SIZE
 
@@ -255,9 +255,9 @@
 #define CONFIG_MAX_MEM_MAPPED		CONFIG_SYS_DDR_BLOCK1_SIZE
 
 #elif defined(CONFIG_ARCH_LS1046A)
-#define CONFIG_SYS_NUM_FMAN			1
-#define CONFIG_SYS_NUM_FM1_DTSEC		8
-#define CONFIG_SYS_NUM_FM1_10GEC		2
+#define CFG_SYS_NUM_FMAN			1
+#define CFG_SYS_NUM_FM1_DTSEC		8
+#define CFG_SYS_NUM_FM1_10GEC		2
 #define CONFIG_SYS_DDR_BLOCK1_SIZE  ((phys_size_t)2 << 30)
 #define CONFIG_MAX_MEM_MAPPED           CONFIG_SYS_DDR_BLOCK1_SIZE
 
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index aef61587334..c11018d7329 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -160,7 +160,7 @@ struct sys_info {
 	unsigned long freq_localbus;
 	unsigned long freq_cga_m2;
 #ifdef CONFIG_SYS_DPAA_FMAN
-	unsigned long freq_fman[CONFIG_SYS_NUM_FMAN];
+	unsigned long freq_fman[CFG_SYS_NUM_FMAN];
 #endif
 	unsigned long freq_qman;
 };
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
index bad18d778aa..a4e971ebbd7 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
@@ -306,7 +306,7 @@ struct sys_info {
 	unsigned long freq_localbus;
 	unsigned long freq_qe;
 #ifdef CONFIG_SYS_DPAA_FMAN
-	unsigned long freq_fman[CONFIG_SYS_NUM_FMAN];
+	unsigned long freq_fman[CFG_SYS_NUM_FMAN];
 #endif
 #ifdef CONFIG_SYS_DPAA_QBMAN
 	unsigned long freq_qman;
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index 49a1aac42b5..b0363c9c102 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -264,7 +264,7 @@ int checkcpu (void)
 #endif
 
 #ifdef CONFIG_SYS_DPAA_FMAN
-	for (i = 0; i < CONFIG_SYS_NUM_FMAN; i++) {
+	for (i = 0; i < CFG_SYS_NUM_FMAN; i++) {
 		printf("       FMAN%d: %s MHz\n", i + 1,
 			strmhz(buf1, sysinfo.freq_fman[i]));
 	}
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 47bea512c92..2c320b202ea 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -162,7 +162,7 @@ void disable_cpc_sram(void)
 
 	cpc_corenet_t *cpc = (cpc_corenet_t *)CFG_SYS_FSL_CPC_ADDR;
 
-	for (i = 0; i < CONFIG_SYS_NUM_CPC; i++, cpc++) {
+	for (i = 0; i < CFG_SYS_NUM_CPC; i++, cpc++) {
 		if (in_be32(&cpc->cpcsrcr0) & CPC_SRCR0_SRAMEN) {
 			/* find and disable LAW of SRAM */
 			struct law_entry law = find_law(CONFIG_SYS_INIT_L3_ADDR);
@@ -232,7 +232,7 @@ void enable_cpc(void)
 			have_hwconfig = true;
 	}
 
-	for (i = 0; i < CONFIG_SYS_NUM_CPC; i++, cpc++) {
+	for (i = 0; i < CFG_SYS_NUM_CPC; i++, cpc++) {
 		if (have_hwconfig) {
 			sprintf(cpc_subarg, "cpc%u", i + 1);
 			cpc_args = hwconfig_sub_f("en_cpc", cpc_subarg, buffer);
@@ -273,7 +273,7 @@ static void invalidate_cpc(void)
 	int i;
 	cpc_corenet_t *cpc = (cpc_corenet_t *)CFG_SYS_FSL_CPC_ADDR;
 
-	for (i = 0; i < CONFIG_SYS_NUM_CPC; i++, cpc++) {
+	for (i = 0; i < CFG_SYS_NUM_CPC; i++, cpc++) {
 		/* skip CPC when it used as all SRAM */
 		if (in_be32(&cpc->cpcsrcr0) & CPC_SRCR0_SRAMEN)
 			continue;
diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
index 6dd61caf1c4..32348b4e147 100644
--- a/arch/powerpc/cpu/mpc85xx/fdt.c
+++ b/arch/powerpc/cpu/mpc85xx/fdt.c
@@ -167,7 +167,7 @@ static inline void ft_fixup_l3cache(void *blob, int off)
 	cpc_corenet_t *cpc = (void *)CFG_SYS_FSL_CPC_ADDR;
 	u32 cfg0 = in_be32(&cpc->cpccfg0);
 
-	size = CPC_CFG0_SZ_K(cfg0) * 1024 * CONFIG_SYS_NUM_CPC;
+	size = CPC_CFG0_SZ_K(cfg0) * 1024 * CFG_SYS_NUM_CPC;
 	num_ways = CPC_CFG0_NUM_WAYS(cfg0);
 	line_size = CPC_CFG0_LINE_SZ(cfg0);
 	num_sets = size / (line_size * num_ways);
@@ -469,7 +469,7 @@ static void ft_fixup_dpaa_clks(void *blob)
 	ft_fixup_clks(blob, "fsl,fman", CFG_SYS_FSL_FM1_OFFSET,
 			sysinfo.freq_fman[0]);
 
-#if (CONFIG_SYS_NUM_FMAN == 2)
+#if (CFG_SYS_NUM_FMAN == 2)
 	ft_fixup_clks(blob, "fsl,fman", CFG_SYS_FSL_FM2_OFFSET,
 			sysinfo.freq_fman[1]);
 #endif
diff --git a/arch/powerpc/cpu/mpc85xx/liodn.c b/arch/powerpc/cpu/mpc85xx/liodn.c
index 9ad48d440f9..abc14fae4ec 100644
--- a/arch/powerpc/cpu/mpc85xx/liodn.c
+++ b/arch/powerpc/cpu/mpc85xx/liodn.c
@@ -104,7 +104,7 @@ static void setup_fman_liodn_base(enum fsl_dpaa_dev dev,
 		fm = (void *)CFG_SYS_FSL_FM1_ADDR;
 		break;
 
-#if (CONFIG_SYS_NUM_FMAN == 2)
+#if (CFG_SYS_NUM_FMAN == 2)
 	case FSL_HW_PORTAL_FMAN2:
 		fm = (void *)CFG_SYS_FSL_FM2_ADDR;
 		break;
@@ -201,7 +201,7 @@ void set_liodns(void)
 	setup_fman_liodn_base(FSL_HW_PORTAL_FMAN1, fman1_liodn_tbl,
 				fman1_liodn_tbl_sz);
 
-#if (CONFIG_SYS_NUM_FMAN == 2)
+#if (CFG_SYS_NUM_FMAN == 2)
 	set_fman_liodn(fman2_liodn_tbl, fman2_liodn_tbl_sz);
 	setup_fman_liodn_base(FSL_HW_PORTAL_FMAN2, fman2_liodn_tbl,
 				fman2_liodn_tbl_sz);
@@ -373,7 +373,7 @@ void fdt_fixup_liodn(void *blob)
 	fdt_fixup_liodn_tbl(blob, liodn_tbl, liodn_tbl_sz);
 #ifdef CONFIG_SYS_DPAA_FMAN
 	fdt_fixup_liodn_tbl_fman(blob, fman1_liodn_tbl, fman1_liodn_tbl_sz);
-#if (CONFIG_SYS_NUM_FMAN == 2)
+#if (CFG_SYS_NUM_FMAN == 2)
 	fdt_fixup_liodn_tbl_fman(blob, fman2_liodn_tbl, fman2_liodn_tbl_sz);
 #endif
 #endif
diff --git a/arch/powerpc/cpu/mpc85xx/p2041_ids.c b/arch/powerpc/cpu/mpc85xx/p2041_ids.c
index 8a833466782..2b790868e12 100644
--- a/arch/powerpc/cpu/mpc85xx/p2041_ids.c
+++ b/arch/powerpc/cpu/mpc85xx/p2041_ids.c
@@ -66,7 +66,7 @@ struct fman_liodn_id_table fman1_liodn_tbl[] = {
 	SET_FMAN_RX_1G_LIODN(1, 2, 12),
 	SET_FMAN_RX_1G_LIODN(1, 3, 13),
 	SET_FMAN_RX_1G_LIODN(1, 4, 14),
-#if (CONFIG_SYS_NUM_FM1_10GEC == 1)
+#if (CFG_SYS_NUM_FM1_10GEC == 1)
 	SET_FMAN_RX_10G_LIODN(1, 0, 15),
 #endif
 };
diff --git a/arch/powerpc/cpu/mpc85xx/p4080_ids.c b/arch/powerpc/cpu/mpc85xx/p4080_ids.c
index 5b766f1d517..ba54b0310a7 100644
--- a/arch/powerpc/cpu/mpc85xx/p4080_ids.c
+++ b/arch/powerpc/cpu/mpc85xx/p4080_ids.c
@@ -62,7 +62,7 @@ struct fman_liodn_id_table fman1_liodn_tbl[] = {
 };
 int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl);
 
-#if (CONFIG_SYS_NUM_FMAN == 2)
+#if (CFG_SYS_NUM_FMAN == 2)
 struct fman_liodn_id_table fman2_liodn_tbl[] = {
 	SET_FMAN_RX_1G_LIODN(2, 0, 16),
 	SET_FMAN_RX_1G_LIODN(2, 1, 17),
@@ -101,7 +101,7 @@ struct liodn_id_table liodn_bases[] = {
 	[FSL_HW_PORTAL_SEC]  = SET_LIODN_BASE_2(96, 106),
 #ifdef CONFIG_SYS_DPAA_FMAN
 	[FSL_HW_PORTAL_FMAN1] = SET_LIODN_BASE_1(32),
-#if (CONFIG_SYS_NUM_FMAN == 2)
+#if (CFG_SYS_NUM_FMAN == 2)
 	[FSL_HW_PORTAL_FMAN2] = SET_LIODN_BASE_1(64),
 #endif
 #endif
diff --git a/arch/powerpc/cpu/mpc85xx/p5040_ids.c b/arch/powerpc/cpu/mpc85xx/p5040_ids.c
index e3d163af9eb..6f11c81aba5 100644
--- a/arch/powerpc/cpu/mpc85xx/p5040_ids.c
+++ b/arch/powerpc/cpu/mpc85xx/p5040_ids.c
@@ -57,7 +57,7 @@ struct fman_liodn_id_table fman1_liodn_tbl[] = {
 };
 int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl);
 
-#if (CONFIG_SYS_NUM_FMAN == 2)
+#if (CFG_SYS_NUM_FMAN == 2)
 struct fman_liodn_id_table fman2_liodn_tbl[] = {
 	SET_FMAN_RX_1G_LIODN(2, 0, 17),
 	SET_FMAN_RX_1G_LIODN(2, 1, 18),
@@ -101,7 +101,7 @@ struct liodn_id_table liodn_bases[] = {
 #ifdef CONFIG_SYS_DPAA_FMAN
 	[FSL_HW_PORTAL_FMAN1] = SET_LIODN_BASE_1(32),
 #endif
-#if (CONFIG_SYS_NUM_FMAN == 2)
+#if (CFG_SYS_NUM_FMAN == 2)
 	[FSL_HW_PORTAL_FMAN2] = SET_LIODN_BASE_1(160),
 #endif
 #ifdef CONFIG_SYS_FSL_RAID_ENGINE
diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
index 31d04819276..e2bdc2f9f11 100644
--- a/arch/powerpc/cpu/mpc85xx/speed.c
+++ b/arch/powerpc/cpu/mpc85xx/speed.c
@@ -406,7 +406,7 @@ void get_sys_info(sys_info_t *sys_info)
 		sys_info->freq_fman[0] = sys_info->freq_systembus / 2;
 		break;
 	}
-#if (CONFIG_SYS_NUM_FMAN) == 2
+#if (CFG_SYS_NUM_FMAN) == 2
 #ifdef CONFIG_SYS_FM2_CLK
 #define FM2_CLK_SEL	0x00000038
 #define FM2_CLK_SHIFT	3
@@ -440,7 +440,7 @@ void get_sys_info(sys_info_t *sys_info)
 		break;
 	}
 #endif
-#endif	/* CONFIG_SYS_NUM_FMAN == 2 */
+#endif	/* CFG_SYS_NUM_FMAN == 2 */
 #else
 	sys_info->freq_fman[0] = sys_info->freq_systembus / CONFIG_SYS_FM1_CLK;
 #endif
@@ -491,7 +491,7 @@ void get_sys_info(sys_info_t *sys_info)
 	} else {
 		sys_info->freq_fman[0] = sys_info->freq_systembus / 2;
 	}
-#if (CONFIG_SYS_NUM_FMAN) == 2
+#if (CFG_SYS_NUM_FMAN) == 2
 	if (rcw_tmp & FM2_CLK_SEL) {
 		if (rcw_tmp & HWA_ASYNC_DIV)
 			sys_info->freq_fman[1] = freq_c_pll[HWA_CC_PLL] / 4;
diff --git a/arch/powerpc/cpu/mpc85xx/t4240_ids.c b/arch/powerpc/cpu/mpc85xx/t4240_ids.c
index 172dbdbe464..8fe4e96a114 100644
--- a/arch/powerpc/cpu/mpc85xx/t4240_ids.c
+++ b/arch/powerpc/cpu/mpc85xx/t4240_ids.c
@@ -122,7 +122,7 @@ struct fman_liodn_id_table fman1_liodn_tbl[] = {
 	SET_FMAN_RX_10G_LIODN(1, 1, 95),
 };
 int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl);
-#if (CONFIG_SYS_NUM_FMAN == 2)
+#if (CFG_SYS_NUM_FMAN == 2)
 struct fman_liodn_id_table fman2_liodn_tbl[] = {
 	SET_FMAN_RX_1G_LIODN(2, 0, 88),
 	SET_FMAN_RX_1G_LIODN(2, 1, 89),
@@ -175,7 +175,7 @@ struct liodn_id_table liodn_bases[] = {
 	[FSL_HW_PORTAL_SEC]  = SET_LIODN_BASE_2(462, 558),
 #ifdef CONFIG_SYS_DPAA_FMAN
 	[FSL_HW_PORTAL_FMAN1] = SET_LIODN_BASE_1(973),
-#if (CONFIG_SYS_NUM_FMAN == 2)
+#if (CFG_SYS_NUM_FMAN == 2)
 	[FSL_HW_PORTAL_FMAN2] = SET_LIODN_BASE_1(1069),
 #endif
 #endif
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index 25d1b486174..2edf0d6f83c 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -41,8 +41,8 @@
 #define QE_NUM_OF_SNUM			28
 
 #elif defined(CONFIG_ARCH_P1023)
-#define CONFIG_SYS_NUM_FMAN		1
-#define CONFIG_SYS_NUM_FM1_DTSEC	2
+#define CFG_SYS_NUM_FMAN		1
+#define CFG_SYS_NUM_FM1_DTSEC	2
 #define CONFIG_SYS_QMAN_NUM_PORTALS	3
 #define CONFIG_SYS_BMAN_NUM_PORTALS	3
 #define CONFIG_SYS_FM_MURAM_SIZE	0x10000
@@ -65,9 +65,9 @@
 #define CFG_SYS_FSL_SRIO_MSG_UNIT_NUM	2
 
 #elif defined(CONFIG_ARCH_P2041) /* also supports P2040 */
-#define CONFIG_SYS_NUM_FMAN		1
-#define CONFIG_SYS_NUM_FM1_DTSEC	5
-#define CONFIG_SYS_NUM_FM1_10GEC	1
+#define CFG_SYS_NUM_FMAN		1
+#define CFG_SYS_NUM_FM1_DTSEC	5
+#define CFG_SYS_NUM_FM1_10GEC	1
 #define CONFIG_SYS_FM_MURAM_SIZE	0x28000
 #define CFG_SYS_FSL_SRIO_MAX_PORTS	2
 #define CFG_SYS_FSL_SRIO_OB_WIN_NUM	9
@@ -75,9 +75,9 @@
 #define CFG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xf0000000
 
 #elif defined(CONFIG_ARCH_P3041)
-#define CONFIG_SYS_NUM_FMAN		1
-#define CONFIG_SYS_NUM_FM1_DTSEC	5
-#define CONFIG_SYS_NUM_FM1_10GEC	1
+#define CFG_SYS_NUM_FMAN		1
+#define CFG_SYS_NUM_FM1_DTSEC	5
+#define CFG_SYS_NUM_FM1_10GEC	1
 #define CONFIG_SYS_FM_MURAM_SIZE	0x28000
 #define CFG_SYS_FSL_SRIO_MAX_PORTS	2
 #define CFG_SYS_FSL_SRIO_OB_WIN_NUM	9
@@ -85,11 +85,11 @@
 #define CFG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xf0000000
 
 #elif defined(CONFIG_ARCH_P4080) /* also supports P4040 */
-#define CONFIG_SYS_NUM_FMAN		2
-#define CONFIG_SYS_NUM_FM1_DTSEC	4
-#define CONFIG_SYS_NUM_FM2_DTSEC	4
-#define CONFIG_SYS_NUM_FM1_10GEC	1
-#define CONFIG_SYS_NUM_FM2_10GEC	1
+#define CFG_SYS_NUM_FMAN		2
+#define CFG_SYS_NUM_FM1_DTSEC	4
+#define CFG_SYS_NUM_FM2_DTSEC	4
+#define CFG_SYS_NUM_FM1_10GEC	1
+#define CFG_SYS_NUM_FM2_10GEC	1
 #define CONFIG_SYS_FM_MURAM_SIZE	0x28000
 #define CFG_SYS_FSL_SRIO_MAX_PORTS	2
 #define CFG_SYS_FSL_SRIO_OB_WIN_NUM	9
@@ -98,11 +98,11 @@
 #define CFG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xff000000
 
 #elif defined(CONFIG_ARCH_P5040)
-#define CONFIG_SYS_NUM_FMAN		2
-#define CONFIG_SYS_NUM_FM1_DTSEC	5
-#define CONFIG_SYS_NUM_FM1_10GEC	1
-#define CONFIG_SYS_NUM_FM2_DTSEC	5
-#define CONFIG_SYS_NUM_FM2_10GEC	1
+#define CFG_SYS_NUM_FMAN		2
+#define CFG_SYS_NUM_FM1_DTSEC	5
+#define CFG_SYS_NUM_FM1_10GEC	1
+#define CFG_SYS_NUM_FM2_DTSEC	5
+#define CFG_SYS_NUM_FM2_10GEC	1
 #define CONFIG_SYS_FM_MURAM_SIZE	0x28000
 #define CFG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xf0000000
 
@@ -119,21 +119,21 @@
 #elif defined(CONFIG_ARCH_T4240)
 #ifdef CONFIG_ARCH_T4240
 #define CFG_SYS_FSL_CLUSTER_CLOCKS   { 1, 1, 4 }
-#define CONFIG_SYS_NUM_FM1_DTSEC	8
-#define CONFIG_SYS_NUM_FM1_10GEC	2
-#define CONFIG_SYS_NUM_FM2_DTSEC	8
-#define CONFIG_SYS_NUM_FM2_10GEC	2
+#define CFG_SYS_NUM_FM1_DTSEC	8
+#define CFG_SYS_NUM_FM1_10GEC	2
+#define CFG_SYS_NUM_FM2_DTSEC	8
+#define CFG_SYS_NUM_FM2_10GEC	2
 #else
-#define CONFIG_SYS_NUM_FM1_DTSEC	6
-#define CONFIG_SYS_NUM_FM1_10GEC	1
-#define CONFIG_SYS_NUM_FM2_DTSEC	8
-#define CONFIG_SYS_NUM_FM2_10GEC	1
+#define CFG_SYS_NUM_FM1_DTSEC	6
+#define CFG_SYS_NUM_FM1_10GEC	1
+#define CFG_SYS_NUM_FM2_DTSEC	8
+#define CFG_SYS_NUM_FM2_10GEC	1
 #endif
 #define CONFIG_SYS_FSL_SRDS_1
 #define CONFIG_SYS_FSL_SRDS_2
 #define CFG_SYS_FSL_SRDS_3
 #define CFG_SYS_FSL_SRDS_4
-#define CONFIG_SYS_NUM_FMAN		2
+#define CFG_SYS_NUM_FMAN		2
 #define CONFIG_SYS_PME_CLK		0
 #define CONFIG_SYS_FSL_IFC_BANK_COUNT	8
 #define CONFIG_SYS_FM1_CLK		3
@@ -146,7 +146,7 @@
 #elif defined(CONFIG_ARCH_B4860) || defined(CONFIG_ARCH_B4420)
 #define CONFIG_SYS_FSL_SRDS_1
 #define CONFIG_SYS_FSL_SRDS_2
-#define CONFIG_SYS_NUM_FMAN		1
+#define CFG_SYS_NUM_FMAN		1
 #define CONFIG_SYS_FM1_CLK		0
 #define CONFIG_SYS_FSL_IFC_BANK_COUNT	4
 #define CONFIG_SYS_FM_MURAM_SIZE	0x60000
@@ -155,23 +155,23 @@
 #define CONFIG_MAX_DSP_CPUS		12
 #define CONFIG_NUM_DSP_CPUS		6
 #define CFG_SYS_FSL_CLUSTER_CLOCKS	{ 1, 4, 4, 4 }
-#define CONFIG_SYS_NUM_FM1_DTSEC	6
-#define CONFIG_SYS_NUM_FM1_10GEC	2
+#define CFG_SYS_NUM_FM1_DTSEC	6
+#define CFG_SYS_NUM_FM1_10GEC	2
 #define CFG_SYS_FSL_SRIO_MAX_PORTS	2
 #define CFG_SYS_FSL_SRIO_OB_WIN_NUM	9
 #define CFG_SYS_FSL_SRIO_IB_WIN_NUM	5
 #else
 #define CONFIG_MAX_DSP_CPUS		2
 #define CFG_SYS_FSL_CLUSTER_CLOCKS	{ 1, 4 }
-#define CONFIG_SYS_NUM_FM1_DTSEC	4
-#define CONFIG_SYS_NUM_FM1_10GEC	0
+#define CFG_SYS_NUM_FM1_DTSEC	4
+#define CFG_SYS_NUM_FM1_10GEC	0
 #endif
 
 #elif defined(CONFIG_ARCH_T1040) || defined(CONFIG_ARCH_T1042)
 #define CFG_SYS_FSL_CLUSTER_CLOCKS   { 1, 1, 1, 1 }
 #define CONFIG_SYS_FSL_SRDS_1
-#define CONFIG_SYS_NUM_FMAN		1
-#define CONFIG_SYS_NUM_FM1_DTSEC	5
+#define CFG_SYS_NUM_FMAN		1
+#define CFG_SYS_NUM_FM1_DTSEC	5
 #define CONFIG_PME_PLAT_CLK_DIV		2
 #define CONFIG_SYS_PME_CLK		CONFIG_PME_PLAT_CLK_DIV
 #define CONFIG_SYS_FSL_IFC_BANK_COUNT	8
@@ -186,9 +186,9 @@
 #elif defined(CONFIG_ARCH_T1024)
 #define CFG_SYS_FSL_CLUSTER_CLOCKS  { 1, 1, 1, 1 }
 #define CONFIG_SYS_FSL_SRDS_1
-#define CONFIG_SYS_NUM_FMAN		1
-#define CONFIG_SYS_NUM_FM1_DTSEC	4
-#define CONFIG_SYS_NUM_FM1_10GEC	1
+#define CFG_SYS_NUM_FMAN		1
+#define CFG_SYS_NUM_FM1_DTSEC	4
+#define CFG_SYS_NUM_FM1_10GEC	1
 #define CONFIG_FSL_FM_10GEC_REGULAR_NOTATION
 #define CONFIG_SYS_FSL_IFC_BANK_COUNT	8
 #define CONFIG_SYS_FM1_CLK		0
@@ -200,12 +200,12 @@
 #define QE_NUM_OF_SNUM			28
 
 #elif defined(CONFIG_ARCH_T2080)
-#define CONFIG_SYS_NUM_FMAN		1
+#define CFG_SYS_NUM_FMAN		1
 #define CFG_SYS_FSL_CLUSTER_CLOCKS	{ 1, 4, 4, 4 }
 #define CONFIG_SYS_FSL_SRDS_1
 #if defined(CONFIG_ARCH_T2080)
-#define CONFIG_SYS_NUM_FM1_DTSEC	8
-#define CONFIG_SYS_NUM_FM1_10GEC	4
+#define CFG_SYS_NUM_FM1_DTSEC	8
+#define CFG_SYS_NUM_FM1_10GEC	4
 #define CONFIG_SYS_FSL_SRDS_2
 #define CFG_SYS_FSL_SRIO_MAX_PORTS	2
 #define CFG_SYS_FSL_SRIO_OB_WIN_NUM	9
diff --git a/arch/powerpc/include/asm/fsl_portals.h b/arch/powerpc/include/asm/fsl_portals.h
index b1fd6bd5cef..54ef4fb6295 100644
--- a/arch/powerpc/include/asm/fsl_portals.h
+++ b/arch/powerpc/include/asm/fsl_portals.h
@@ -11,7 +11,7 @@ enum fsl_dpaa_dev {
 	FSL_HW_PORTAL_SEC,
 #ifdef CONFIG_SYS_DPAA_FMAN
 	FSL_HW_PORTAL_FMAN1,
-#if (CONFIG_SYS_NUM_FMAN == 2)
+#if (CFG_SYS_NUM_FMAN == 2)
 	FSL_HW_PORTAL_FMAN2,
 #endif
 #endif