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authorTom Rini2017-06-10 09:48:09 -0400
committerTom Rini2017-06-10 09:48:09 -0400
commitd2e1ee686ab16c022d1a3049a35b4ce89a25d34e (patch)
tree8cacb796cda155844349ebd6ff68935dcc8e2042 /arch
parent75fd49c836d9a1750c9b6d86c0511b990fbe9fa8 (diff)
parent76a5e1b7156d16fec3dfa17c5135b28d4d657f0e (diff)
Merge branch 'master' of git://git.denx.de/u-boot-video
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/include/asm/arch-sunxi/cpu_sun4i.h10
-rw-r--r--arch/arm/include/asm/arch-sunxi/display2.h17
2 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
index 6aa5e91adae..2419062d45d 100644
--- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
+++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
@@ -34,7 +34,9 @@
#define SUNXI_MS_BASE 0x01c07000
#define SUNXI_TVD_BASE 0x01c08000
#define SUNXI_CSI0_BASE 0x01c09000
+#ifndef CONFIG_MACH_SUNXI_H3_H5
#define SUNXI_TVE0_BASE 0x01c0a000
+#endif
#define SUNXI_EMAC_BASE 0x01c0b000
#define SUNXI_LCD0_BASE 0x01c0C000
#define SUNXI_LCD1_BASE 0x01c0d000
@@ -161,10 +163,18 @@ defined(CONFIG_MACH_SUN50I)
/* module sram */
#define SUNXI_SRAM_C_BASE 0x01d00000
+#ifndef CONFIG_MACH_SUN8I_H3
#define SUNXI_DE_FE0_BASE 0x01e00000
+#else
+#define SUNXI_TVE0_BASE 0x01e00000
+#endif
#define SUNXI_DE_FE1_BASE 0x01e20000
#define SUNXI_DE_BE0_BASE 0x01e60000
+#ifndef CONFIG_MACH_SUN50I_H5
#define SUNXI_DE_BE1_BASE 0x01e40000
+#else
+#define SUNXI_TVE0_BASE 0x01e40000
+#endif
#define SUNXI_MP_BASE 0x01e80000
#define SUNXI_AVG_BASE 0x01ea0000
diff --git a/arch/arm/include/asm/arch-sunxi/display2.h b/arch/arm/include/asm/arch-sunxi/display2.h
index b5875f96050..359cacd90bc 100644
--- a/arch/arm/include/asm/arch-sunxi/display2.h
+++ b/arch/arm/include/asm/arch-sunxi/display2.h
@@ -90,6 +90,23 @@ struct de_ui {
u32 ovl_size;
};
+struct de_csc {
+ u32 csc_ctl;
+ u8 res[0xc];
+ u32 coef11;
+ u32 coef12;
+ u32 coef13;
+ u32 coef14;
+ u32 coef21;
+ u32 coef22;
+ u32 coef23;
+ u32 coef24;
+ u32 coef31;
+ u32 coef32;
+ u32 coef33;
+ u32 coef34;
+};
+
/*
* DE register constants.
*/