diff options
| author | Simon Glass | 2015-01-01 16:18:11 -0700 |
|---|---|---|
| committer | Simon Glass | 2015-01-13 07:25:01 -0800 |
| commit | db55bd7dad9a2c30c8da884bf20273945e240430 (patch) | |
| tree | dac252456e42491d3ccd523f7d9dfbe78a898de0 /arch | |
| parent | aaafcd6c3f472f81d2c87b96571fba2e0f55b368 (diff) | |
x86: Commit the current MTRRs before relocation
Once we stop running from ROM we should set up the MTTRs to speed up
execution. This is only needed for platforms that don't have an FSP.
Also in the Coreboot case, the MTRRs are set up for us.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/x86/lib/init_helpers.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/x86/lib/init_helpers.c b/arch/x86/lib/init_helpers.c index be4eb12c53c..fc211d9d5c4 100644 --- a/arch/x86/lib/init_helpers.c +++ b/arch/x86/lib/init_helpers.c @@ -7,6 +7,7 @@ #include <common.h> #include <fdtdec.h> #include <spi.h> +#include <asm/mtrr.h> #include <asm/sections.h> DECLARE_GLOBAL_DATA_PTR; @@ -66,6 +67,13 @@ int calculate_relocation_address(void) int init_cache_f_r(void) { +#if defined(CONFIG_X86_RESET_VECTOR) & !defined(CONFIG_HAVE_FSP) + int ret; + + ret = mtrr_commit(false); + if (ret) + return ret; +#endif /* Initialise the CPU cache(s) */ return init_cache(); } |