diff options
| author | Peng Fan | 2019-08-27 06:25:30 +0000 |
|---|---|---|
| committer | Stefano Babic | 2019-10-08 16:36:36 +0200 |
| commit | dbb2b7e50899ea6651bdc4c931427e6152493ba2 (patch) | |
| tree | ead67612e370f9238655514af592a53d146394f8 /arch | |
| parent | 59efa6b52bb25f66bb0b0f6f633e6c403a37be3d (diff) | |
imx8m: set BYPASS ID SWAP to avoid AXI bus errors
set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to
generated AXI bus errors with TZC380 enabled.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-imx/imx8m/soc.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index dd393b581be..261f586fc02 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -55,6 +55,8 @@ void enable_tzc380(void) /* Enable TZASC and lock setting */ setbits_le32(&gpr->gpr[10], GPR_TZASC_EN); setbits_le32(&gpr->gpr[10], GPR_TZASC_EN_LOCK); + if (IS_ENABLED(CONFIG_IMX8MM)) + setbits_le32(&gpr->gpr[10], BIT(1)); } void set_wdog_reset(struct wdog_regs *wdog) |