diff options
author | Tom Rini | 2024-07-18 07:49:14 -0600 |
---|---|---|
committer | Tom Rini | 2024-07-18 07:49:14 -0600 |
commit | dce89b3bfc5ed2d2f5439474f7edda1a3b085094 (patch) | |
tree | 2d3fdebd6e4f5b737604be4b15076e2c2ccd1e4e /arch | |
parent | 84ab75fb56337a7c186044850d3f6555bc644df1 (diff) | |
parent | e8b3f6c1018e1401bcc697a8aed8120061e4f189 (diff) |
Merge tag 'u-boot-rockchip-20240718' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
- Add boards:
rk3328: Radxa ROCK Pi E v3;
rk3588s: FriendlyElec NanoPi R6C/S;
- Remove board: Theobroma Systems RK3368 Lion;
- Add rk3588 pcie support;
- Misc updates for board and config;
CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/2163
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/dts/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/dts/rk3328-rock-pi-e-base-u-boot.dtsi | 42 | ||||
-rw-r--r-- | arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi | 41 | ||||
-rw-r--r-- | arch/arm/dts/rk3328-rock-pi-e-v3-u-boot.dtsi | 4 | ||||
-rw-r--r-- | arch/arm/dts/rk3328-rock-pi-e-v3.dts | 4 | ||||
-rw-r--r-- | arch/arm/dts/rk3368-lion-haikou-u-boot.dtsi | 119 | ||||
-rw-r--r-- | arch/arm/dts/rk3368-lion-haikou.dts | 144 | ||||
-rw-r--r-- | arch/arm/dts/rk3368-lion.dtsi | 318 | ||||
-rw-r--r-- | arch/arm/dts/rk3399-u-boot.dtsi | 5 | ||||
-rw-r--r-- | arch/arm/dts/rk3588s-nanopi-r6c-u-boot.dtsi | 3 | ||||
-rw-r--r-- | arch/arm/dts/rk3588s-nanopi-r6s-u-boot.dtsi | 3 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-rockchip/cru.h | 2 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-rockchip/cru_rk3588.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-rockchip/Kconfig | 4 | ||||
-rw-r--r-- | arch/arm/mach-rockchip/px30/syscon_px30.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-rockchip/rk3368/Kconfig | 22 | ||||
-rw-r--r-- | arch/arm/mach-rockchip/rk3588/Kconfig | 26 |
17 files changed, 99 insertions, 644 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 4a4d5be2bd6..7265e554257 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -83,7 +83,6 @@ dtb-$(CONFIG_ROCKCHIP_RK3288) += \ rk3288-vyasa.dtb dtb-$(CONFIG_ROCKCHIP_RK3368) += \ - rk3368-lion-haikou.dtb \ rk3368-sheep.dtb \ rk3368-geekbox.dtb \ rk3368-px5-evb.dtb \ diff --git a/arch/arm/dts/rk3328-rock-pi-e-base-u-boot.dtsi b/arch/arm/dts/rk3328-rock-pi-e-base-u-boot.dtsi new file mode 100644 index 00000000000..39bb66c4fcb --- /dev/null +++ b/arch/arm/dts/rk3328-rock-pi-e-base-u-boot.dtsi @@ -0,0 +1,42 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2020 Radxa + */ + +#include "rk3328-u-boot.dtsi" + +/ { + smbios { + compatible = "u-boot,sysinfo-smbios"; + + smbios { + system { + manufacturer = "radxa"; + product = "rock-pi-e_rk3328"; + }; + + baseboard { + manufacturer = "radxa"; + product = "rock-pi-e_rk3328"; + }; + + chassis { + manufacturer = "radxa"; + product = "rock-pi-e_rk3328"; + }; + }; + }; +}; + +&u2phy_host { + phy-supply = <&vcc_host_5v>; +}; + +&vcc_host_5v { + /delete-property/ regulator-always-on; + /delete-property/ regulator-boot-on; +}; + +&vcc_sd { + bootph-pre-ram; +}; diff --git a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi index d314bfad6fc..8e82f6a6f1f 100644 --- a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi +++ b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi @@ -1,43 +1,4 @@ // SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2020 Radxa - */ -#include "rk3328-u-boot.dtsi" +#include "rk3328-rock-pi-e-base-u-boot.dtsi" #include "rk3328-sdram-ddr3-666.dtsi" - -/ { - smbios { - compatible = "u-boot,sysinfo-smbios"; - - smbios { - system { - manufacturer = "radxa"; - product = "rock-pi-e_rk3328"; - }; - - baseboard { - manufacturer = "radxa"; - product = "rock-pi-e_rk3328"; - }; - - chassis { - manufacturer = "radxa"; - product = "rock-pi-e_rk3328"; - }; - }; - }; -}; - -&u2phy_host { - phy-supply = <&vcc_host_5v>; -}; - -&vcc_host_5v { - /delete-property/ regulator-always-on; - /delete-property/ regulator-boot-on; -}; - -&vcc_sd { - bootph-pre-ram; -}; diff --git a/arch/arm/dts/rk3328-rock-pi-e-v3-u-boot.dtsi b/arch/arm/dts/rk3328-rock-pi-e-v3-u-boot.dtsi new file mode 100644 index 00000000000..4d89ae54e61 --- /dev/null +++ b/arch/arm/dts/rk3328-rock-pi-e-v3-u-boot.dtsi @@ -0,0 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include "rk3328-rock-pi-e-base-u-boot.dtsi" +#include "rk3328-sdram-ddr4-666.dtsi" diff --git a/arch/arm/dts/rk3328-rock-pi-e-v3.dts b/arch/arm/dts/rk3328-rock-pi-e-v3.dts new file mode 100644 index 00000000000..f1c1c36a99d --- /dev/null +++ b/arch/arm/dts/rk3328-rock-pi-e-v3.dts @@ -0,0 +1,4 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; +#include "rk3328-rock-pi-e.dts" diff --git a/arch/arm/dts/rk3368-lion-haikou-u-boot.dtsi b/arch/arm/dts/rk3368-lion-haikou-u-boot.dtsi deleted file mode 100644 index a3c2b707e9a..00000000000 --- a/arch/arm/dts/rk3368-lion-haikou-u-boot.dtsi +++ /dev/null @@ -1,119 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR X11 -/* - * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH - */ - -#include "rk3368-u-boot.dtsi" - -/ { - config { - u-boot,spl-payload-offset = <0x40000>; /* @ 256KB */ - u-boot,mmc-env-offset = <0x4000>; /* @ 16KB */ - }; - - chosen { - stdout-path = "serial0:115200n8"; - u-boot,spl-boot-order = &emmc, &sdmmc; - }; - - smbios { - compatible = "u-boot,sysinfo-smbios"; - - smbios { - system { - manufacturer = "rockchip"; - product = "sheep_rk3368"; - }; - - baseboard { - manufacturer = "rockchip"; - product = "sheep_rk3368"; - }; - - chassis { - manufacturer = "rockchip"; - product = "sheep_rk3368"; - }; - }; - }; -}; - -&gpio2 { - bootph-all; -}; - -&pinctrl { - bootph-all; -}; - -&service_msch { - bootph-all; -}; - -&dmc { - bootph-all; - - /* - * Validation of throughput using SPEC2000 shows the following - * relative performance for the different memory schedules: - * - CBDR: 30.1 - * - CBRD: 29.8 - * - CRBD: 29.9 - * Note that the best performance for any given application workload - * may vary from the default configured here (e.g. 164.gzip is fastest - * with CBRD, whereas 252.eon and 186.crafty are fastest with CRBD). - * - * See doc/device-tree-bindings/clock/rockchip,rk3368-dmc.txt for - * details on the 'rockchip,memory-schedule' property and how it - * affects the physical-address to device-address mapping. - */ - rockchip,memory-schedule = <DMC_MSCH_CBDR>; - rockchip,ddr-frequency = <800000000>; - rockchip,ddr-speed-bin = <DDR3_1600K>; - - status = "okay"; -}; - -&pmugrf { - bootph-all; -}; - -&sgrf { - bootph-all; -}; - -&cru { - bootph-all; -}; - -&grf { - bootph-all; -}; - -&uart0 { - bootph-all; -}; - -&emmc { - bootph-pre-ram; -}; - -&sdmmc { - bootph-pre-ram; -}; - -&spi1 { - bootph-pre-ram; - - spiflash: w25q32dw@0 { - bootph-pre-ram; - }; -}; - -&timer0 { - bootph-all; - clock-frequency = <24000000>; - status = "okay"; -}; - - diff --git a/arch/arm/dts/rk3368-lion-haikou.dts b/arch/arm/dts/rk3368-lion-haikou.dts deleted file mode 100644 index cae01d35b93..00000000000 --- a/arch/arm/dts/rk3368-lion-haikou.dts +++ /dev/null @@ -1,144 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2018 Theobroma Systems Design und Consulting GmbH - */ - -/dts-v1/; -#include "rk3368-lion.dtsi" - -/ { - model = "Theobroma Systems RK3368-uQ7 Baseboard"; - compatible = "tsd,rk3368-lion-haikou", "rockchip,rk3368"; - - aliases { - mmc1 = &sdmmc; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - i2cmux2 { - i2c@0 { - eeprom: eeprom@50 { - compatible = "atmel,24c01"; - pagesize = <8>; - reg = <0x50>; - }; - }; - }; - - leds { - pinctrl-0 = <&module_led_pins>, <&sd_card_led_pin>; - - sd_card_led: led-3 { - label = "sd_card_led"; - gpios = <&gpio0 RK_PD2 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "mmc0"; - }; - }; - - dc_12v: dc-12v { - compatible = "regulator-fixed"; - regulator-name = "dc_12v"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - vcc3v3_baseboard: vcc3v3-baseboard { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_baseboard"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&dc_12v>; - }; - - vcc5v0_otg: vcc5v0-otg-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&otg_vbus_drv>; - regulator-name = "vcc5v0_otg"; - regulator-always-on; - }; -}; - -&sdmmc { - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - cd-gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_LOW>; - disable-wp; - max-frequency = <25000000>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; - rockchip,default-sample-phase = <90>; - vmmc-supply = <&vcc3v3_baseboard>; - status = "okay"; -}; - -&spi2 { - cs-gpios = <0>, <&gpio2 RK_PC3 GPIO_ACTIVE_LOW>; - status = "okay"; -}; - -&usb_otg { - dr_mode = "otg"; - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; - status = "okay"; -}; - -&uart1 { - /* alternate function of GPIO5/6 */ - status = "disabled"; -}; - -&pinctrl { - pinctrl-names = "default"; - pinctrl-0 = <&haikou_pin_hog>; - - hog { - haikou_pin_hog: haikou-pin-hog { - rockchip,pins = - /* LID_BTN */ - <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>, - /* BATLOW# */ - <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>, - /* SLP_BTN# */ - <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>, - /* BIOS_DISABLE# */ - <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - leds { - sd_card_led_pin: sd-card-led-pin { - rockchip,pins = - <0 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - sdmmc { - sdmmc_cd_pin: sdmmc-cd-pin { - rockchip,pins = - <2 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb_otg { - otg_vbus_drv: otg-vbus-drv { - rockchip,pins = - <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; diff --git a/arch/arm/dts/rk3368-lion.dtsi b/arch/arm/dts/rk3368-lion.dtsi deleted file mode 100644 index bcd7977fb0f..00000000000 --- a/arch/arm/dts/rk3368-lion.dtsi +++ /dev/null @@ -1,318 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2018 Theobroma Systems Design und Consulting GmbH - */ - -/dts-v1/; -#include "rk3368.dtsi" - -/ { - aliases { - mmc0 = &emmc; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - ext_gmac: gmac-clk { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "ext_gmac"; - #clock-cells = <0>; - }; - - i2cmux1 { - compatible = "i2c-mux-gpio"; - #address-cells = <1>; - #size-cells = <0>; - i2c-parent = <&i2c1>; - mux-gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>; - - /* Q7_GPO_I2C */ - i2c@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - }; - - /* Q7_SMB */ - i2c@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - }; - }; - - i2cmux2 { - compatible = "i2c-mux-gpio"; - #address-cells = <1>; - #size-cells = <0>; - i2c-parent = <&i2c2>; - mux-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>; - - /* Q7_LVDS_BLC_I2C */ - i2c@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - fan: fan@18 { - compatible = "ti,amc6821"; - reg = <0x18>; - #cooling-cells = <2>; - }; - - rtc_twi: rtc@6f { - compatible = "isil,isl1208"; - reg = <0x6f>; - }; - }; - - /* Q7_GP2_I2C */ - i2c@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - }; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&module_led_pins>; - - module_led1: led-1 { - label = "module_led1"; - gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "heartbeat"; - panic-indicator; - }; - - module_led2: led-2 { - label = "module_led2"; - gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>; - default-state = "off"; - }; - }; - - vcc_sys: vcc-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_sys"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - regulator-boot-on; - }; -}; - -&cpu_l0 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu_l1 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu_l2 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu_l3 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu_b0 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu_b1 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu_b2 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu_b3 { - cpu-supply = <&vdd_cpu>; -}; - -&emmc { - bus-width = <8>; - clock-frequency = <150000000>; - mmc-hs200-1_8v; - non-removable; - vmmc-supply = <&vcc33_io>; - vqmmc-supply = <&vcc18_io>; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_bus8>; - status = "okay"; -}; - -&gmac { - assigned-clocks = <&cru SCLK_MAC>; - assigned-clock-parents = <&ext_gmac>; - clock_in_out = "input"; - phy-supply = <&vcc33_io>; - phy-mode = "rgmii"; - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; - snps,reset-active-low; - snps,reset-delays-us = <0 10000 50000>; - snps,reset-gpio = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>; - tx_delay = <0x10>; - rx_delay = <0x10>; - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - rk808: pmic@1b { - compatible = "rockchip,rk808"; - reg = <0x1b>; - interrupt-parent = <&gpio0>; - interrupts = <RK_PA5 IRQ_TYPE_LEVEL_LOW>; - clock-output-names = "xin32k", "rk808-clkout2"; - #clock-cells = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l>, <&pmic_sleep>; - rockchip,system-power-controller; - vcc1-supply = <&vcc_sys>; - vcc2-supply = <&vcc_sys>; - vcc3-supply = <&vcc_sys>; - vcc4-supply = <&vcc_sys>; - vcc6-supply = <&vcc_sys>; - vcc7-supply = <&vcc_sys>; - vcc8-supply = <&vcc_sys>; - vcc9-supply = <&vcc_sys>; - vcc10-supply = <&vcc_sys>; - vcc11-supply = <&vcc_sys>; - vcc12-supply = <&vcc_sys>; - - regulators { - vdd_cpu: DCDC_REG1 { - regulator-name = "vdd_cpu"; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - }; - - vdd_log: DCDC_REG2 { - regulator-name = "vdd_log"; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - }; - - vcc33_io: DCDC_REG4 { - regulator-name = "vcc33_io"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - }; - - vcc33_video: LDO_REG2 { - regulator-name = "vcc33_video"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - }; - - vdd10_pll: LDO_REG3 { - regulator-name = "vdd10_pll"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - regulator-boot-on; - }; - - vcc18_io: LDO_REG4 { - regulator-name = "vcc18_io"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - }; - - vdd10_video: LDO_REG6 { - regulator-name = "vdd10_video"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - regulator-boot-on; - }; - - vcc18_video: LDO_REG8 { - regulator-name = "vcc18_video"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - }; - }; - }; -}; - -&i2c1 { - status = "okay"; -}; - -&i2c2 { - status = "okay"; -}; - -&pinctrl { - leds { - module_led_pins: module-led-pins { - rockchip,pins = - <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, - <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - pmic_sleep: pmic-sleep { - rockchip,pins = <0 RK_PA0 2 &pcfg_pull_none>; - }; - }; -}; - -&spi1 { - status = "okay"; - - norflash: flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <50000000>; - }; -}; - -&uart1 { - status = "okay"; -}; - -&uart3 { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&wdt { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi index b6b43271172..2bec139d833 100644 --- a/arch/arm/dts/rk3399-u-boot.dtsi +++ b/arch/arm/dts/rk3399-u-boot.dtsi @@ -145,6 +145,11 @@ bootph-some-ram; }; +&spi1 { + bootph-pre-ram; + bootph-some-ram; +}; + &spi1_clk { bootph-pre-ram; bootph-some-ram; diff --git a/arch/arm/dts/rk3588s-nanopi-r6c-u-boot.dtsi b/arch/arm/dts/rk3588s-nanopi-r6c-u-boot.dtsi new file mode 100644 index 00000000000..853ed58cfe5 --- /dev/null +++ b/arch/arm/dts/rk3588s-nanopi-r6c-u-boot.dtsi @@ -0,0 +1,3 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +#include "rk3588s-u-boot.dtsi" diff --git a/arch/arm/dts/rk3588s-nanopi-r6s-u-boot.dtsi b/arch/arm/dts/rk3588s-nanopi-r6s-u-boot.dtsi new file mode 100644 index 00000000000..853ed58cfe5 --- /dev/null +++ b/arch/arm/dts/rk3588s-nanopi-r6s-u-boot.dtsi @@ -0,0 +1,3 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +#include "rk3588s-u-boot.dtsi" diff --git a/arch/arm/include/asm/arch-rockchip/cru.h b/arch/arm/include/asm/arch-rockchip/cru.h index 9778790f348..c3259b8e7cc 100644 --- a/arch/arm/include/asm/arch-rockchip/cru.h +++ b/arch/arm/include/asm/arch-rockchip/cru.h @@ -17,6 +17,8 @@ # include <asm/arch-rockchip/cru_rk3399.h> #elif defined(CONFIG_ROCKCHIP_RK3568) #include <asm/arch-rockchip/cru_rk3568.h> +#elif defined(CONFIG_ROCKCHIP_RK3588) +#include <asm/arch-rockchip/cru_rk3588.h> #endif /* CRU_GLB_RST_ST */ diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3588.h b/arch/arm/include/asm/arch-rockchip/cru_rk3588.h index a0e54d39654..dad484813fa 100644 --- a/arch/arm/include/asm/arch-rockchip/cru_rk3588.h +++ b/arch/arm/include/asm/arch-rockchip/cru_rk3588.h @@ -92,6 +92,8 @@ struct rk3588_cru { unsigned int pmuclkgate_con[9]; /* Address Offset: 0x0100 */ }; +#define rockchip_cru rk3588_cru + check_member(rk3588_cru, mode_con00, 0x280); check_member(rk3588_cru, pmuclksel_con[1], 0x30304); diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 14b3ab1a572..fc1b638ff01 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -16,6 +16,8 @@ config ROCKCHIP_PX30 select DEBUG_UART_BOARD_INIT imply ROCKCHIP_COMMON_BOARD imply SPL_ROCKCHIP_COMMON_BOARD + imply ARMV8_CRYPTO + imply ARMV8_SET_SMPEN help The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35 including NEON and GPU, Mali-400 graphics, several DDR3 options @@ -167,6 +169,7 @@ config ROCKCHIP_RK3308 imply LEGACY_IMAGE_FORMAT imply MISC imply MISC_INIT_R + imply OF_LIBFDT_OVERLAY imply OF_UPSTREAM imply RNG_ROCKCHIP imply ROCKCHIP_COMMON_BOARD @@ -197,6 +200,7 @@ config ROCKCHIP_RK3328 imply ARMV8_SET_SMPEN imply MISC imply MISC_INIT_R + imply OF_LIBFDT_OVERLAY imply OF_LIVE imply OF_UPSTREAM imply PRE_CONSOLE_BUFFER diff --git a/arch/arm/mach-rockchip/px30/syscon_px30.c b/arch/arm/mach-rockchip/px30/syscon_px30.c index c9de57493d8..893a5234baa 100644 --- a/arch/arm/mach-rockchip/px30/syscon_px30.c +++ b/arch/arm/mach-rockchip/px30/syscon_px30.c @@ -18,6 +18,9 @@ static const struct udevice_id px30_syscon_ids[] = { U_BOOT_DRIVER(syscon_px30) = { .id = UCLASS_SYSCON, .name = "px30_syscon", +#if CONFIG_IS_ENABLED(OF_REAL) + .bind = dm_scan_fdt_dev, +#endif .of_match = px30_syscon_ids, }; diff --git a/arch/arm/mach-rockchip/rk3368/Kconfig b/arch/arm/mach-rockchip/rk3368/Kconfig index 3de695186ed..a7be30bbd89 100644 --- a/arch/arm/mach-rockchip/rk3368/Kconfig +++ b/arch/arm/mach-rockchip/rk3368/Kconfig @@ -3,27 +3,6 @@ if ROCKCHIP_RK3368 choice prompt "RK3368 board" -config TARGET_LION_RK3368 - bool "Theobroma Systems RK3368-uQ7 (Lion) module" - select ARCH_EARLY_INIT_R - help - The RK3368-uQ7 is a micro-Qseven form-factor (40mm x 70mm, - MXM-230 connector) system-on-module designed by Theobroma - Systems for industrial applications. - - It provides the following features: - - 8x Cortex-A53 (in 2 clusters of 4 cores each) - - (on-module) up to 4GB of DDR3 memory - - (on-module) SPI-NOR flash - - (on-module) eMMC - - Gigabit Ethernet (with an on-module KSZ9031 PHY) - - USB - - HDMI - - MIPI-DSI/single-channel LVDS (muxed on the 'LVDS-A' pin-group) - - various 'slow' interfaces (e.g. UART, SPI, I2C, I2S, ...) - - on-module STM32 providing CAN, RTC and fan-control - - (optional on-module) EAL4+-certified security module - config TARGET_SHEEP bool "Sheep board" help @@ -62,7 +41,6 @@ config SPL_LIBCOMMON_SUPPORT config SPL_LIBGENERIC_SUPPORT default y -source "board/theobroma-systems/lion_rk3368/Kconfig" source "board/rockchip/sheep_rk3368/Kconfig" source "board/geekbuying/geekbox/Kconfig" source "board/rockchip/evb_px5/Kconfig" diff --git a/arch/arm/mach-rockchip/rk3588/Kconfig b/arch/arm/mach-rockchip/rk3588/Kconfig index 9a35c7d9cc2..e751d64e1a1 100644 --- a/arch/arm/mach-rockchip/rk3588/Kconfig +++ b/arch/arm/mach-rockchip/rk3588/Kconfig @@ -78,6 +78,30 @@ config TARGET_NANOPCT6_RK3588 Power: 5.5*2.1mm DC Jack, 12VDC input Dimensions: 110x80x1.6mm (without case) / 86x114.5x30mm (with case) +config TARGET_NANOPI_R6C_RK3588S + bool "FriendlyElec NanoPi R6C" + select BOARD_LATE_INIT + help + The NanoPi R6C is a SBC by FriendlyElec based on the Rockchip + RK3588s. + It comes with 4GB or 8GB of RAM, a microSD card slot, optional 32GB + eMMC storage, one M.2 M-Key connector, one RTL8211F 1GbE and one + RTL8125 2.5GbE Ethernet port, one USB 2.0 Type-A and one USB 3.0 + Type-A port, a HDMI port, a 30-pin GPIO header as well as some + buttons and LEDs. + +config TARGET_NANOPI_R6S_RK3588S + bool "FriendlyElec NanoPi R6S" + select BOARD_LATE_INIT + help + The NanoPi R6S is a SBC by FriendlyElec based on the Rockchip + RK3588s. + It comes with 4GB or 8GB of RAM, a microSD card slot, 32GB eMMC + storage, one RTL8211F 1GbE and two RTL8125 2.5GbE Ethernet ports, + one USB 2.0 Type-A and one USB 3.0 Type-A port, a HDMI port, a + 12-pin GPIO FPC connector, a fan connector, IR receiver as well + as some buttons and LEDs. + config TARGET_NOVA_RK3588 bool "Indiedroid Nova RK3588" select BOARD_LATE_INIT @@ -288,6 +312,8 @@ config TEXT_BASE source "board/armsom/sige7-rk3588/Kconfig" source "board/edgeble/neural-compute-module-6/Kconfig" source "board/friendlyelec/nanopc-t6-rk3588/Kconfig" +source "board/friendlyelec/nanopi-r6c-rk3588s/Kconfig" +source "board/friendlyelec/nanopi-r6s-rk3588s/Kconfig" source "board/indiedroid/nova/Kconfig" source "board/pine64/quartzpro64-rk3588/Kconfig" source "board/turing/turing-rk1-rk3588/Kconfig" |