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authorMichal Simek2018-07-20 10:17:17 +0200
committerMichal Simek2018-08-06 08:44:35 +0200
commitdf0996907018cef836e17a076422fd22daa435e0 (patch)
tree898d524ea11d5ef36bf7d6896f142b24f543d8a2 /arch
parent7996fcca9d401437527d9e9a464cb79965c90c98 (diff)
arm: zynq: Fix indentation for zynq-cse targets
Trivial DT style fixes. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/dts/zynq-cse-nand.dts3
-rw-r--r--arch/arm/dts/zynq-cse-nor.dts1
2 files changed, 1 insertions, 3 deletions
diff --git a/arch/arm/dts/zynq-cse-nand.dts b/arch/arm/dts/zynq-cse-nand.dts
index 9b1dd19a85d..1e16d7fab97 100644
--- a/arch/arm/dts/zynq-cse-nand.dts
+++ b/arch/arm/dts/zynq-cse-nand.dts
@@ -38,7 +38,7 @@
#size-cells = <1>;
ranges;
- slcr: slcr@f8000000 {
+ slcr: slcr@f8000000 {
u-boot,dm-pre-reloc;
#address-cells = <1>;
#size-cells = <1>;
@@ -72,7 +72,6 @@
};
};
};
-
};
&dcc {
diff --git a/arch/arm/dts/zynq-cse-nor.dts b/arch/arm/dts/zynq-cse-nor.dts
index edc8f59f6ce..9710abadcf0 100644
--- a/arch/arm/dts/zynq-cse-nor.dts
+++ b/arch/arm/dts/zynq-cse-nor.dts
@@ -79,7 +79,6 @@
};
};
};
-
};
&dcc {