diff options
| author | Patrice Chotard | 2021-11-15 11:39:17 +0100 |
|---|---|---|
| committer | Patrice Chotard | 2021-11-30 11:15:59 +0100 |
| commit | e114ddc3851775ebad13b74124af446497d9b6da (patch) | |
| tree | 6b3b823763f56e00423e44a2a4df35e5a379503d /arch | |
| parent | e447a18095ad049c10983b366756da24f3a8ef2a (diff) | |
ARM: dts: stm32: Use lower-case hex for address for stm32f469-disco-u-boot.dtsi
Replace upper-case hex with lower-case hex for address.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/stm32f469-disco-u-boot.dtsi | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/dts/stm32f469-disco-u-boot.dtsi b/arch/arm/dts/stm32f469-disco-u-boot.dtsi index 9eda8f535b7..cd173623eff 100644 --- a/arch/arm/dts/stm32f469-disco-u-boot.dtsi +++ b/arch/arm/dts/stm32f469-disco-u-boot.dtsi @@ -34,7 +34,7 @@ fmc: fmc@A0000000 { compatible = "st,stm32-fmc"; - reg = <0xA0000000 0x1000>; + reg = <0xa0000000 0x1000>; clocks = <&rcc 0 STM32F4_AHB3_CLOCK(FMC)>; st,syscfg = <&syscfg>; pinctrl-0 = <&fmc_pins_d32>; @@ -70,7 +70,7 @@ compatible = "st,stm32f469-qspi"; #address-cells = <1>; #size-cells = <0>; - reg = <0xA0001000 0x1000>, <0x90000000 0x10000000>; + reg = <0xa0001000 0x1000>, <0x90000000 0x10000000>; reg-names = "qspi", "qspi_mm"; interrupts = <91>; spi-max-frequency = <108000000>; @@ -236,7 +236,7 @@ }; &qspi { - reg = <0xA0001000 0x1000>, <0x90000000 0x1000000>; + reg = <0xa0001000 0x1000>, <0x90000000 0x1000000>; flash0: n25q128a@0 { #address-cells = <1>; #size-cells = <1>; |