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authorTom Rini2018-04-03 08:33:15 -0400
committerTom Rini2018-04-03 08:33:15 -0400
commite63d142f6fbab886fc2975274425a70eaedb4239 (patch)
tree95a84dfe5f2ff8114b6e0f00016524df9a1b5d5f /arch
parent645b5afbb8215b3386cd6fc2dc3119bd68e4c760 (diff)
parentf770b3ee1830a5fbd3b44cd051d9e5468339d651 (diff)
Merge tag 'arc-for-2018.05' of git://git.denx.de/u-boot-arc
More ARC changes and fixes for v2018.05 * Update of ARC tools to the most recent arc-2017.09 * Fix for compile-time warning for AXS10x * Add support of platform-specific commands for HSDK * Add support for on-board SPI flash on HSDK Note though that for write support another series [1] is required. I hope that Jagan will be able to review and act on SPI flash improvement series before we get beyond RC1. Also note that to get clean build for HSDK we need to disable stack-usage check [2] as our current GCC erroneously tries to calculate stack-usage on a naked function which leads to warning. [1] https://patchwork.ozlabs.org/project/uboot/list/?series=35796 [2] https://patchwork.ozlabs.org/patch/894139/
Diffstat (limited to 'arch')
-rw-r--r--arch/arc/dts/axs10x_mb.dtsi5
-rw-r--r--arch/arc/dts/hsdk.dts56
2 files changed, 56 insertions, 5 deletions
diff --git a/arch/arc/dts/axs10x_mb.dtsi b/arch/arc/dts/axs10x_mb.dtsi
index b74d3c85459..17ef656483c 100644
--- a/arch/arc/dts/axs10x_mb.dtsi
+++ b/arch/arc/dts/axs10x_mb.dtsi
@@ -31,11 +31,8 @@
};
ethernet@18000 {
- #interrupt-cells = <1>;
compatible = "altr,socfpga-stmmac";
reg = < 0x18000 0x2000 >;
- interrupts = < 25 >;
- interrupt-names = "macirq";
phy-mode = "gmii";
snps,pbl = < 32 >;
clocks = <&apbclk>;
@@ -46,13 +43,11 @@
ehci@0x40000 {
compatible = "generic-ehci";
reg = < 0x40000 0x100 >;
- interrupts = < 8 >;
};
ohci@0x60000 {
compatible = "generic-ohci";
reg = < 0x60000 0x100 >;
- interrupts = < 8 >;
};
uart0: serial0@22000 {
diff --git a/arch/arc/dts/hsdk.dts b/arch/arc/dts/hsdk.dts
index 67dfb93ca8d..80b864af743 100644
--- a/arch/arc/dts/hsdk.dts
+++ b/arch/arc/dts/hsdk.dts
@@ -6,6 +6,7 @@
/dts-v1/;
#include "skeleton.dtsi"
+#include "dt-bindings/clock/snps,hsdk-cgu.h"
/ {
#address-cells = <1>;
@@ -13,6 +14,7 @@
aliases {
console = &uart0;
+ spi0 = &spi0;
};
cpu_card {
@@ -24,6 +26,35 @@
};
};
+ clk-fmeas {
+ clocks = <&cgu_clk CLK_ARC_PLL>, <&cgu_clk CLK_SYS_PLL>,
+ <&cgu_clk CLK_TUN_PLL>, <&cgu_clk CLK_DDR_PLL>,
+ <&cgu_clk CLK_ARC>, <&cgu_clk CLK_HDMI_PLL>,
+ <&cgu_clk CLK_TUN_TUN>, <&cgu_clk CLK_HDMI>,
+ <&cgu_clk CLK_SYS_APB>, <&cgu_clk CLK_SYS_AXI>,
+ <&cgu_clk CLK_SYS_ETH>, <&cgu_clk CLK_SYS_USB>,
+ <&cgu_clk CLK_SYS_SDIO>, <&cgu_clk CLK_SYS_HDMI>,
+ <&cgu_clk CLK_SYS_GFX_CORE>, <&cgu_clk CLK_SYS_GFX_DMA>,
+ <&cgu_clk CLK_SYS_GFX_CFG>, <&cgu_clk CLK_SYS_DMAC_CORE>,
+ <&cgu_clk CLK_SYS_DMAC_CFG>, <&cgu_clk CLK_SYS_SDIO_REF>,
+ <&cgu_clk CLK_SYS_SPI_REF>, <&cgu_clk CLK_SYS_I2C_REF>,
+ <&cgu_clk CLK_SYS_UART_REF>, <&cgu_clk CLK_SYS_EBI_REF>,
+ <&cgu_clk CLK_TUN_ROM>, <&cgu_clk CLK_TUN_PWM>;
+ clock-names = "cpu-pll", "sys-pll",
+ "tun-pll", "ddr-clk",
+ "cpu-clk", "hdmi-pll",
+ "tun-clk", "hdmi-clk",
+ "apb-clk", "axi-clk",
+ "eth-clk", "usb-clk",
+ "sdio-clk", "hdmi-sys-clk",
+ "gfx-core-clk", "gfx-dma-clk",
+ "gfx-cfg-clk", "dmac-core-clk",
+ "dmac-cfg-clk", "sdio-ref-clk",
+ "spi-clk", "i2c-clk",
+ "uart-clk", "ebi-clk",
+ "rom-clk", "pwm-clk";
+ };
+
cgu_clk: cgu-clk@f0000000 {
compatible = "snps,hsdk-cgu-clock";
reg = <0xf0000000 0x10>, <0xf00014B8 0x4>;
@@ -53,4 +84,29 @@
compatible = "generic-ohci";
reg = <0xf0060000 0x100>;
};
+
+ spi0: spi@f0020000 {
+ compatible = "snps,dw-apb-ssi";
+ reg = <0xf0020000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spi-max-frequency = <4000000>;
+ clocks = <&cgu_clk CLK_SYS_SPI_REF>;
+ clock-names = "spi_clk";
+ cs-gpio = <&cs_gpio 0>;
+ spi_flash@0 {
+ compatible = "spi-flash";
+ reg = <0>;
+ spi-max-frequency = <4000000>;
+ };
+ };
+
+ cs_gpio: gpio@f00014b0 {
+ compatible = "snps,hsdk-creg-gpio";
+ reg = <0xf00014b0 0x4>;
+ gpio-controller;
+ #gpio-cells = <1>;
+ gpio-bank-name = "hsdk-spi-cs";
+ gpio-count = <1>;
+ };
};