diff options
author | Tim Harvey | 2015-05-18 06:56:45 -0700 |
---|---|---|
committer | Stefano Babic | 2015-05-19 15:31:40 +0200 |
commit | f0e8e8944dc9bdddd0e3e3b7dbd8ac76008b32a4 (patch) | |
tree | f0020c7b60a74fec0ab840c27a0373a7214f3414 /arch | |
parent | b83ddac80553ae001b4daa412e386e00d45d0bbb (diff) |
imx: mx6: add get_cpu_temp_grade to obtain cpu temperature grade from OTP
The MX6 has a temperature grade defined by OCOTP_MEM0[7:6] which is at 0x480
in the Fusemap Description Table in the reference manual. Return this value
as well as min/max temperature based on the value.
Note that the IMX6SDLRM and the IMX6SXRM do not indicate this in the
their Fusemap Description Table however Freescale has confirmed that these
eFUSE bits match the description within the IMX6DQRM and that they will
be added to the next revision of the respective reference manuals.
This has been tested with IMX6 Automative and Industrial parts.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/cpu/armv7/mx6/soc.c | 38 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-mx6/sys_proto.h | 1 |
2 files changed, 39 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index f91b725b15c..b21bd03a8aa 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -124,6 +124,44 @@ u32 get_cpu_speed_grade_hz(void) return 0; } +/* + * OCOTP_MEM0[7:6] (see Fusemap Description Table offset 0x480) + * defines a 2-bit Temperature Grade + * + * return temperature grade and min/max temperature in celcius + */ +#define OCOTP_MEM0_TEMP_SHIFT 6 + +u32 get_cpu_temp_grade(int *minc, int *maxc) +{ + struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; + struct fuse_bank *bank = &ocotp->bank[1]; + struct fuse_bank1_regs *fuse = + (struct fuse_bank1_regs *)bank->fuse_regs; + uint32_t val; + + val = readl(&fuse->mem0); + val >>= OCOTP_MEM0_TEMP_SHIFT; + val &= 0x3; + + if (minc && maxc) { + if (val == TEMP_AUTOMOTIVE) { + *minc = -40; + *maxc = 125; + } else if (val == TEMP_INDUSTRIAL) { + *minc = -40; + *maxc = 105; + } else if (val == TEMP_EXTCOMMERCIAL) { + *minc = -20; + *maxc = 105; + } else { + *minc = 0; + *maxc = 95; + } + } + return val; +} + #ifdef CONFIG_REVISION_TAG u32 __weak get_board_rev(void) { diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h index a2cd0a9efff..c5832912b42 100644 --- a/arch/arm/include/asm/arch-mx6/sys_proto.h +++ b/arch/arm/include/asm/arch-mx6/sys_proto.h @@ -17,6 +17,7 @@ u32 get_nr_cpus(void); u32 get_cpu_rev(void); u32 get_cpu_speed_grade_hz(void); +u32 get_cpu_temp_grade(int *minc, int *maxc); /* returns MXC_CPU_ value */ #define cpu_type(rev) (((rev) >> 12)&0xff) |