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authorKever Yang2017-05-01 16:16:01 -0600
committerSimon Glass2017-05-10 13:37:21 -0600
commitfd9884e292c8fb981bf25cf5aefaa1b685bda21e (patch)
tree3f4f963d78742d640f3941385dd08113b0f11502 /arch
parent76e1693b9bb423318d212d0170e142640f226d95 (diff)
rockchip: dts: evb-rk3399: add gmac support
Enable gmac for evb-rk3399. Change-Id: I85e35667e08e22e38577e63eb0e65731fc9c69b6 Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/dts/rk3399-evb.dts39
1 files changed, 39 insertions, 0 deletions
diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index 574eb1cf960..77b45219818 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -6,6 +6,7 @@
/dts-v1/;
#include <dt-bindings/pwm/pwm.h>
+#include <dt-bindings/pinctrl/rockchip.h>
#include "rk3399.dtsi"
#include "rk3399-sdram-lpddr3-4GB-1600.dtsi"
@@ -59,6 +60,12 @@
gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
};
+ clkin_gmac: external-gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <125000000>;
+ clock-output-names = "clkin_gmac";
+ #clock-cells = <0>;
+ };
};
&emmc_phy {
@@ -164,3 +171,35 @@
};
};
};
+
+&gmac {
+ phy-supply = <&vcc_phy>;
+ phy-mode = "rgmii";
+ clock_in_out = "input";
+ snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+ snps,reset-active-low;
+ snps,reset-delays-us = <0 10000 50000>;
+ assigned-clocks = <&cru SCLK_RMII_SRC>;
+ assigned-clock-parents = <&clkin_gmac>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ tx_delay = <0x10>;
+ rx_delay = <0x10>;
+ status = "okay";
+};
+
+&gmac {
+ phy-supply = <&vcc_phy>;
+ phy-mode = "rgmii";
+ clock_in_out = "input";
+ snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+ snps,reset-active-low;
+ snps,reset-delays-us = <0 10000 50000>;
+ assigned-clocks = <&cru SCLK_RMII_SRC>;
+ assigned-clock-parents = <&clkin_gmac>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ tx_delay = <0x10>;
+ rx_delay = <0x10>;
+ status = "okay";
+};