diff options
| author | Miquel Raynal | 2019-10-03 19:50:03 +0200 |
|---|---|---|
| committer | Tom Rini | 2019-12-03 23:04:10 -0500 |
| commit | 88718be3001055fa2801a44ab10570279b3f2cb7 (patch) | |
| tree | ec3825f5e8c3efd226917fa2745fac26c0d5c88e /board/BuR/brppt1 | |
| parent | 94d022bb400890f22fe35220d2519c3bce73f05e (diff) | |
mtd: rename CONFIG_NAND -> CONFIG_MTD_RAW_NAND
Add more clarity by changing the Kconfig entry name.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
[trini: Re-run migration, update a few more cases]
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Diffstat (limited to 'board/BuR/brppt1')
| -rw-r--r-- | board/BuR/brppt1/board.c | 2 | ||||
| -rw-r--r-- | board/BuR/brppt1/mux.c | 6 |
2 files changed, 4 insertions, 4 deletions
diff --git a/board/BuR/brppt1/board.c b/board/BuR/brppt1/board.c index dd9649ca072..8aa03eac283 100644 --- a/board/BuR/brppt1/board.c +++ b/board/BuR/brppt1/board.c @@ -150,7 +150,7 @@ int board_init(void) hw_watchdog_init(); #endif gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND gpmc_init(); #endif return 0; diff --git a/board/BuR/brppt1/mux.c b/board/BuR/brppt1/mux.c index 87eee709fd4..b863d373350 100644 --- a/board/BuR/brppt1/mux.c +++ b/board/BuR/brppt1/mux.c @@ -118,7 +118,7 @@ static struct module_pin_mux mii2_pin_mux[] = { {OFFSET(gpmc_be1n), (MODE(1) | RXACTIVE)},/* MII1_COL */ {-1}, }; -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND static struct module_pin_mux nand_pin_mux[] = { {OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */ {OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */ @@ -180,7 +180,7 @@ static struct module_pin_mux gpIOs[] = { {OFFSET(mcasp0_axr0), (MODE(7) | PULLUDDIS) }, /* GPIO3_17 (MCASP0_AHCLKR) - ETH2_LEDY */ {OFFSET(mcasp0_ahclkr), (MODE(7) | PULLUDDIS) }, -#ifndef CONFIG_NAND +#ifndef CONFIG_MTD_RAW_NAND /* GPIO2_3 - NAND_OE */ {OFFSET(gpmc_oen_ren), (MODE(7) | PULLDOWN_EN | RXACTIVE)}, /* GPIO2_4 - NAND_WEN */ @@ -241,7 +241,7 @@ void enable_board_pin_mux(void) configure_module_pin_mux(i2c0_pin_mux); configure_module_pin_mux(mii1_pin_mux); configure_module_pin_mux(mii2_pin_mux); -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND configure_module_pin_mux(nand_pin_mux); #elif defined(CONFIG_MMC) configure_module_pin_mux(mmc1_pin_mux); |