arm: i.MX6UL: add Armadeus Systems OPOS6UL SoM and OPOS6ULDev carrier board

OPOS6UL is an i.MX6UL based SoM with 256MB RAM, 4GB eMMC and an ethernet
phy. OPOS6ULDev is carrier board for the OPOS6UL.

U-Boot SPL 2017.03-rc3-00002-g5085c26 (Mar 07 2017 - 09:48:09)
Trying to boot from MMC1

U-Boot 2017.03-rc3-00002-g5085c26 (Mar 07 2017 - 09:48:09 +0100)

CPU:   Freescale i.MX6UL rev1.0 528 MHz (running at 396 MHz)
CPU:   Industrial temperature grade (-40C to 105C) at 40C
Reset cause: POR
Model: Armadeus Systems OPOS6UL SoM on OPOS6ULDev board
DRAM:  256 MiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
Video: 800x480x18
In:    serial
Out:   serial
Err:   serial
Net:   FEC [PRIME]
Hit any key to stop autoboot:  0

Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

4 files changed, 152 insertions, 0 deletions

diff --git a/board/armadeus/opos6uldev/Kconfig b/board/armadeus/opos6uldev/Kconfig
new file mode 100644
index 00000000000..beca37dfb38
--- /dev/null
+++ b/board/armadeus/opos6uldev/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_OPOS6ULDEV
+
+config SYS_BOARD
+	default "opos6uldev"
+
+config SYS_VENDOR
+	default "armadeus"
+
+config SYS_CONFIG_NAME
+	default "opos6uldev"
+
+config IMX_CONFIG
+	default "arch/arm/imx-common/spl_sd.cfg"
+
+endif
diff --git a/board/armadeus/opos6uldev/MAINTAINERS b/board/armadeus/opos6uldev/MAINTAINERS
new file mode 100644
index 00000000000..e46c66942d5
--- /dev/null
+++ b/board/armadeus/opos6uldev/MAINTAINERS
@@ -0,0 +1,6 @@
+OPOS6ULDev BOARD
+M:	Sébastien Szymanski <sebastien.szymanski@armadeus.com>
+S:	Maintained
+F:	board/armadeus/opos6uldev/
+F:	include/configs/opos6uldev.h
+F:	configs/opos6uldev_defconfig
diff --git a/board/armadeus/opos6uldev/Makefile b/board/armadeus/opos6uldev/Makefile
new file mode 100644
index 00000000000..fd14fd75a6d
--- /dev/null
+++ b/board/armadeus/opos6uldev/Makefile
@@ -0,0 +1,6 @@
+# (C) Copyright 2017 Armadeus Systems
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y  := board.o
diff --git a/board/armadeus/opos6uldev/board.c b/board/armadeus/opos6uldev/board.c
new file mode 100644
index 00000000000..500d0bd2dfd
--- /dev/null
+++ b/board/armadeus/opos6uldev/board.c
@@ -0,0 +1,125 @@
+/*
+ * Copyright (C) 2017 Armadeus Systems
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <asm/arch/clock.h>
+#include <asm/arch/mx6-pins.h>
+#include <asm/arch/opos6ul.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/gpio.h>
+#include <asm/imx-common/iomux-v3.h>
+#include <asm/io.h>
+#include <common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_VIDEO_MXS
+#define LCD_PAD_CTRL ( \
+	PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
+	PAD_CTL_PKE | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm \
+)
+
+static iomux_v3_cfg_t const lcd_pads[] = {
+	MX6_PAD_LCD_CLK__LCDIF_CLK | MUX_PAD_CTRL(LCD_PAD_CTRL),
+	MX6_PAD_LCD_ENABLE__LCDIF_ENABLE | MUX_PAD_CTRL(LCD_PAD_CTRL),
+	MX6_PAD_LCD_HSYNC__LCDIF_HSYNC | MUX_PAD_CTRL(LCD_PAD_CTRL),
+	MX6_PAD_LCD_VSYNC__LCDIF_VSYNC | MUX_PAD_CTRL(LCD_PAD_CTRL),
+	MX6_PAD_LCD_DATA00__LCDIF_DATA00 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+	MX6_PAD_LCD_DATA01__LCDIF_DATA01 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+	MX6_PAD_LCD_DATA02__LCDIF_DATA02 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+	MX6_PAD_LCD_DATA03__LCDIF_DATA03 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+	MX6_PAD_LCD_DATA04__LCDIF_DATA04 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+	MX6_PAD_LCD_DATA05__LCDIF_DATA05 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+	MX6_PAD_LCD_DATA06__LCDIF_DATA06 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+	MX6_PAD_LCD_DATA07__LCDIF_DATA07 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+	MX6_PAD_LCD_DATA08__LCDIF_DATA08 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+	MX6_PAD_LCD_DATA09__LCDIF_DATA09 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+	MX6_PAD_LCD_DATA10__LCDIF_DATA10 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+	MX6_PAD_LCD_DATA11__LCDIF_DATA11 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+	MX6_PAD_LCD_DATA12__LCDIF_DATA12 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+	MX6_PAD_LCD_DATA13__LCDIF_DATA13 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+	MX6_PAD_LCD_DATA14__LCDIF_DATA14 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+	MX6_PAD_LCD_DATA15__LCDIF_DATA15 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+	MX6_PAD_LCD_DATA16__LCDIF_DATA16 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+	MX6_PAD_LCD_DATA17__LCDIF_DATA17 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+
+	MX6_PAD_NAND_ALE__GPIO4_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL)
+};
+
+int setup_lcd(void)
+{
+	struct gpio_desc backlight;
+	int ret;
+
+	enable_lcdif_clock(LCDIF1_BASE_ADDR, 1);
+
+	imx_iomux_v3_setup_multiple_pads(lcd_pads, ARRAY_SIZE(lcd_pads));
+
+	/* Set Brightness to high */
+	ret = dm_gpio_lookup_name("GPIO4_10", &backlight);
+	if (ret) {
+		printf("Cannot get GPIO4_10\n");
+		return ret;
+	}
+
+	ret = dm_gpio_request(&backlight, "backlight");
+	if (ret) {
+		printf("Cannot request GPIO4_10\n");
+		return ret;
+	}
+
+	dm_gpio_set_dir_flags(&backlight, GPIOD_IS_OUT);
+	dm_gpio_set_value(&backlight, 1);
+
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_USB_EHCI_MX6
+#define USB_OTHERREGS_OFFSET	0x800
+#define UCTRL_PWR_POL		(1 << 9)
+
+int board_ehci_hcd_init(int port)
+{
+	u32 *usbnc_usb_ctrl;
+
+	if (port > 1)
+		return -EINVAL;
+
+	usbnc_usb_ctrl = (u32 *)(USB_BASE_ADDR + USB_OTHERREGS_OFFSET +
+				 port * 4);
+
+	/* Set Power polarity */
+	setbits_le32(usbnc_usb_ctrl, UCTRL_PWR_POL);
+
+	return 0;
+}
+#endif
+
+int opos6ul_board_late_init(void)
+{
+#ifdef CONFIG_VIDEO_MXS
+	setup_lcd();
+#endif
+
+	return 0;
+}
+
+#ifdef CONFIG_SPL_BUILD
+#define UART_PAD_CTRL (						\
+	PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |	\
+	PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST			\
+)
+
+static iomux_v3_cfg_t const uart1_pads[] = {
+	MX6_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
+	MX6_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
+};
+
+void opos6ul_setup_uart_debug(void)
+{
+	imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
+}
+#endif /* CONFIG_SPL_BUILD */