diff options
author | Erik van Luijk | 2015-08-13 15:43:18 +0200 |
---|---|---|
committer | Andreas Bießmann | 2015-08-21 15:47:02 +0200 |
commit | 0c01c3e876c0db59b4075a4a7550020f0ea25981 (patch) | |
tree | 2cfb8af2d6351192ee05826fd1b98870a0f0a023 /board/atmel/at91sam9n12ek | |
parent | 8d77576371381ade83de475bb639949b44941e8c (diff) |
arm: at91: mpddr: allow multiple DDR controllers
The mpddr.c depends on ATMEL_BASE_MPDDRC for the base address to configure the controller.
This cannot be used when there is more than one controller (i.e. AT91SAM9G45, AT91SAM9M10).
Signed-off-by: Erik van Luijk <evanluijk@interact.nl>
[remove 'new blank line at EOF']
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Diffstat (limited to 'board/atmel/at91sam9n12ek')
-rw-r--r-- | board/atmel/at91sam9n12ek/at91sam9n12ek.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/atmel/at91sam9n12ek/at91sam9n12ek.c b/board/atmel/at91sam9n12ek/at91sam9n12ek.c index 4f46a035333..8437f37d33e 100644 --- a/board/atmel/at91sam9n12ek/at91sam9n12ek.c +++ b/board/atmel/at91sam9n12ek/at91sam9n12ek.c @@ -327,6 +327,6 @@ void mem_init(void) writel(csa, &matrix->ebicsa); /* DDRAM2 Controller initialize */ - ddr2_init(ATMEL_BASE_CS1, &ddr2); + ddr2_init(ATMEL_BASE_DDRSDRC, ATMEL_BASE_CS1, &ddr2); } #endif |