diff options
| author | Stefan Roese | 2016-06-28 15:45:13 +0200 |
|---|---|---|
| committer | Bin Meng | 2016-08-16 11:44:09 +0800 |
| commit | 303dfc2e5efeaebfb7f01f2e59e5870e645376ca (patch) | |
| tree | 300be0fb15ff0d95a16ef75c5e1dca9e69aa90d2 /board/congatec | |
| parent | ca6c5e03f132e9042c27472650184be9e8263508 (diff) | |
x86: conga-qeval20-qa3: Add SMBus support and SMSC2513 config code
This patch includes the following changes:
- Remove Designware I2C support from dts as its not used
- Configure SMBus PADs in dts
- Enable I2C commands and I2C support
- Configure SMSC2513 USB hub via SMBus upon startup
- Move environment location to match Minnowmax example
- Enhancement of the default environment
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'board/congatec')
| -rw-r--r-- | board/congatec/conga-qeval20-qa3-e3845/conga-qeval20-qa3.c | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/board/congatec/conga-qeval20-qa3-e3845/conga-qeval20-qa3.c b/board/congatec/conga-qeval20-qa3-e3845/conga-qeval20-qa3.c index 737e6103f37..7a5b7659ef6 100644 --- a/board/congatec/conga-qeval20-qa3-e3845/conga-qeval20-qa3.c +++ b/board/congatec/conga-qeval20-qa3-e3845/conga-qeval20-qa3.c @@ -5,6 +5,7 @@ */ #include <common.h> +#include <i2c.h> #include <winbond_w83627.h> #include <asm/gpio.h> #include <asm/ibmpc.h> @@ -31,3 +32,42 @@ int arch_early_init_r(void) { return 0; } + +int board_late_init(void) +{ + struct udevice *dev; + u8 buf[8]; + int ret; + + /* Configure SMSC USB2513 USB Hub: 7bit address 0x2c */ + ret = i2c_get_chip_for_busnum(0, 0x2c, 1, &dev); + if (ret) { + printf("Cannot find USB2513: %d\n", ret); + return 0; + } + + /* + * The first access to the USB Hub fails sometimes, so lets read + * a dummy byte to be sure here + */ + dm_i2c_read(dev, 0x00, buf, 1); + + /* + * The SMSC hub is not visible on the I2C bus after the first + * configuration at power-up. The following code deliberately + * does not report upon failure of these I2C write calls. + */ + buf[0] = 0x93; + dm_i2c_write(dev, 0x06, buf, 1); + + buf[0] = 0xaa; + dm_i2c_write(dev, 0xf8, buf, 1); + + buf[0] = 0x0f; + dm_i2c_write(dev, 0xfa, buf, 1); + + buf[0] = 0x01; + dm_i2c_write(dev, 0xff, buf, 1); + + return 0; +} |