diff options
| author | Marek Vasut | 2024-01-19 17:08:32 +0100 |
|---|---|---|
| committer | Fabio Estevam | 2024-01-22 08:39:08 -0300 |
| commit | 67de291400725155afc637a18207a726781aa432 (patch) | |
| tree | b6fbb8632608e3e3bd874e023f395fde68554a0a /board/data_modul | |
| parent | 4dd80cb09ec333035a0cb812cae123dac568807c (diff) | |
ARM: imx: Configure GIC clock parent on Data Modul i.MX8M Plus eDM SBC
The CONFIG_SPL_BOARD_INIT lets SPL common code call spl_board_init()
during the SPL start up. On this particular system, spl_board_init()
is used to reconfigure GIC clock parent to PLL2 500M, which is the
configuration expected by the Linux kernel. Enable SPL_BOARD_INIT
and fill in the GIC clock configuration code.
Set GIC clock to 500 MHz for OD VDD_SOC. Kernel driver does not
allow to change it. Should set the clock after PMIC setting done.
Default is 400 MHz (system_pll1_800m with div = 2) set by ROM for
ND VDD_SOC.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Diffstat (limited to 'board/data_modul')
| -rw-r--r-- | board/data_modul/imx8mp_edm_sbc/spl.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/board/data_modul/imx8mp_edm_sbc/spl.c b/board/data_modul/imx8mp_edm_sbc/spl.c index a3600c8568a..cc2d253e391 100644 --- a/board/data_modul/imx8mp_edm_sbc/spl.c +++ b/board/data_modul/imx8mp_edm_sbc/spl.c @@ -80,6 +80,19 @@ int data_modul_imx_edm_sbc_board_power_init(void) return 0; } +void spl_board_init(void) +{ + /* + * Set GIC clock to 500 MHz for OD VDD_SOC. Kernel driver does not + * allow to change it. Should set the clock after PMIC setting done. + * Default is 400 MHz (system_pll1_800m with div = 2) set by ROM for + * ND VDD_SOC. + */ + clock_enable(CCGR_GIC, 0); + clock_set_target_val(GIC_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(5)); + clock_enable(CCGR_GIC, 1); +} + int spl_board_boot_device(enum boot_device boot_dev_spl) { if (boot_dev_spl == SPI_NOR_BOOT) /* SPI NOR */ |