diff options
| author | Jean-Christophe PLAGNIOL-VILLARD | 2008-10-16 15:01:15 +0200 |
|---|---|---|
| committer | Wolfgang Denk | 2008-10-18 21:54:03 +0200 |
| commit | 6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch) | |
| tree | ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /board/esd/wuh405 | |
| parent | 71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff) | |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'board/esd/wuh405')
| -rw-r--r-- | board/esd/wuh405/flash.c | 4 | ||||
| -rw-r--r-- | board/esd/wuh405/wuh405.c | 8 |
2 files changed, 6 insertions, 6 deletions
diff --git a/board/esd/wuh405/flash.c b/board/esd/wuh405/flash.c index 89af1190a8a..274ada9fe5c 100644 --- a/board/esd/wuh405/flash.c +++ b/board/esd/wuh405/flash.c @@ -48,7 +48,7 @@ unsigned long flash_init (void) int size_val = 0; /* Init: no FLASHes known */ - for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) { + for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) { flash_info[i].flash_id = FLASH_UNKNOWN; } @@ -91,7 +91,7 @@ unsigned long flash_init (void) /* Monitor protection ON by default */ (void)flash_protect(FLAG_PROTECT_SET, - -CFG_MONITOR_LEN, + -CONFIG_SYS_MONITOR_LEN, 0xffffffff, &flash_info[0]); diff --git a/board/esd/wuh405/wuh405.c b/board/esd/wuh405/wuh405.c index 3a94fd86b27..5eca3bd380d 100644 --- a/board/esd/wuh405/wuh405.c +++ b/board/esd/wuh405/wuh405.c @@ -92,8 +92,8 @@ int misc_init_r (void) int index; int i; - dst = malloc(CFG_FPGA_MAX_SIZE); - if (gunzip (dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) { + dst = malloc(CONFIG_SYS_FPGA_MAX_SIZE); + if (gunzip (dst, CONFIG_SYS_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) { printf ("GUNZIP ERROR - must RESET board to recover\n"); do_reset (NULL, 0, 0, NULL); } @@ -155,9 +155,9 @@ int misc_init_r (void) /* * Reset external DUARTs */ - out32(GPIO0_OR, in32(GPIO0_OR) | CFG_DUART_RST); /* set reset to high */ + out32(GPIO0_OR, in32(GPIO0_OR) | CONFIG_SYS_DUART_RST); /* set reset to high */ udelay(10); /* wait 10us */ - out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_DUART_RST); /* set reset to low */ + out32(GPIO0_OR, in32(GPIO0_OR) & ~CONFIG_SYS_DUART_RST); /* set reset to low */ udelay(1000); /* wait 1ms */ /* |