aboutsummaryrefslogtreecommitdiff
path: root/board/firefly
diff options
context:
space:
mode:
authorAdrian Fiergolski2021-06-08 12:37:23 +0200
committerMichal Simek2021-06-11 09:24:58 +0200
commit3414712ba8a82d6566e00645da8d37ea085a9f7c (patch)
treed673f70707b65bb9ade3c1b916b2f65b348be6aa /board/firefly
parente3b64beda5dd1a6b6bedfd1fe0e50be1ddea7044 (diff)
arm64: zynqmp: Writing correct value to ANALOG_BUS
The default register configuration after powerup for PSSYSMON_ANALOG_BUS register is incorrect. Hence, fix this in SPL by writing correct fixed value. It follows UG1085 chapter 'PS SYSMON Analog_Bus' and reflects commit sw_apps:zynq ("056ca65d44549ce27f716d423e8dfdefeee7440c") in Xilinx:embeddedsw[1]. [1] https://github.com/Xilinx/embeddedsw Signed-off-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'board/firefly')
0 files changed, 0 insertions, 0 deletions